FORMFACTOR INC - Annual Report: 2008 (Form 10-K)

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UNITED STATES
SECURITIES AND EXCHANGE COMMISSION
Washington, D.C. 20549

FORM 10-K

Commission file number: 000-50307

FormFactor, Inc.
(Exact name of registrant as specified in its charter)

Securities registered pursuant to Section 12(b) of the Act: Common Stock

Name of each exchange on which registered: NASDAQ Global Market

Securities registered pursuant to Section 12(g) of the Act: None

          Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes o    No ý

          Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Exchange Act. Yes o    No ý

          Indicate by check mark whether the registrant: (1) has filed all reports required to be filed by Section 13 or 15(d) of the Exchange Act during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes ý    No o

          Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant's knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K ý

          Indicate by check mark whether the registrant is a large accelerated filer, an accelerated filer, a non-accelerated filer or a smaller reporting company. See the definitions of "large accelerated filer," "accelerated filer" and "smaller reporting company" in Rule 12b-2 of the Exchange Act:

          Indicate by check mark whether the registrant is a shell company (as defined in Rule 12b-2 of the Exchange Act). Yes o    No ý

          Aggregate market value of registrant's common stock held by non-affiliates of the registrant, based upon the closing price of a share of the registrant's common stock on June 28, 2008 as reported by NASDAQ Global Market on that date: $386,027,758. Shares of the registrant's common stock held by each officer and director and each person who owns 5% or more of the outstanding common stock of the registrant have been excluded in that such persons may be deemed to be affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

          The number of shares of the registrant's common stock, par value $0.001 per share, outstanding as of February 20, 2009 was 49,231,979 shares.

DOCUMENTS INCORPORATED BY REFERENCE

          Portions of the registrant's definitive Proxy Statement for the 2009 Annual Meeting of Stockholders, which will be filed within 120 days of the end of the fiscal year ended December 27, 2008, are incorporated by reference in Part III hereof. Except with respect to information specifically incorporated by reference in this Form 10-K, the Proxy Statement is not deemed to be filed as a part of this Form 10-K.

FORMFACTOR, INC.
Form 10-K for the Fiscal Year Ended December 27, 2008
Index

        FormFactor, the FormFactor logo and its product and technology names, including DC-Boost, Harmony, MicroSpring, MicroForce, MicroLign, RapidSoak, TRE and TrueScale, are trademarks or registered trademarks of FormFactor in the United States and other countries. All other trademarks, trade names or service marks appearing in this Annual Report on Form 10-K are the property of their respective owners.

        Throughout this Annual Report on Form 10-K, we refer to FormFactor, Inc. and its consolidated subsidiaries as "FormFactor," "the Company," "we," "us," and "our". Our fiscal years end on the last Saturday in December. Our last three fiscal years ended on December 30, 2006, December 29, 2007 and December 27, 2008.

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NOTE REGARDING FORWARD-LOOKING STATEMENTS

        This Annual Report on Form 10-K contains forward-looking statements within the meaning of the Securities Exchange Act of 1934 and the Securities Act of 1933, which are subject to risks and uncertainties. The forward-looking statements include statements concerning, among other things, our business strategy (including anticipated trends and developments in, and management plans for, our business and the markets in which we operate), financial results, operating results, revenues, gross margin, operating expenses, products, projected costs and capital expenditures, research and development programs, sales and marketing initiatives and competition. In some cases, you can identify these statements by forward-looking words, such as "may," "might," "will," "could," "should," "expect," "plan," "anticipate," "believe," "estimate," "predict," "intend" and "continue," the negative or plural of these words and other comparable terminology. The forward-looking statements are based on information available to us as of the filing date of this Annual Report on Form 10-K and our current expectations about future events, which are inherently subject to change and involve risks and uncertainties. You should not place undue reliance on these forward-looking statements. We undertake no obligation to update any of these statements for any reason. Actual events or results may differ materially from those expressed or implied by these statements due to various factors, including but not limited to the matters discussed in the section entitled "Item 1A: Risk Factors" and elsewhere in this Form 10-K. You should carefully consider the numerous risks and uncertainties described in such section.

PART I

Item 1:    Business

        We design, develop, manufacture, sell and support precision, high performance advanced semiconductor wafer probe card products and solutions. Semiconductor manufacturers use our wafer probe cards to perform wafer sort and test on the semiconductor die, or chips, or the whole semiconductor wafer, which is prior to singulation of the wafer into individual separate chips. During wafer sort and test, a wafer probe card is mounted in a prober, which in turn is connected to a semiconductor tester. The wafer probe card is used as an interface to connect electronically with and test individual chips on a wafer. Our wafer probe cards are used by our customers in the front end of the semiconductor manufacturing process, as are our parametric or in-line probe cards. We introduced our first wafer probe card based on our MicroSpring® interconnect technology in 1995. We offer products and solutions that are custom designed for semiconductor manufacturers' unique wafer designs and enable them to reduce their overall cost of test.

        The oversupply of memory devices in the early part of our fiscal 2008 coupled with the overall economic slowdown had a significant impact on global semiconductor device manufacturing and produced a challenging environment for our advanced wafer test products. Overall, our revenue declined year-over-year in each of the major semiconductor device segments we address—Dynamic Random Access Memory, or DRAM, NAND and NOR Flash and System on Chip, or SoC. These results were due to a number of factors including the relative supply and demand of various semiconductor devices and end products incorporating those devices, device manufacturers' efforts to conserve cash by pulling back on production and by delaying the ramp of new technology nodes. To face these challenges, we focused on demand-generation including working to win over customers with an improved full-wafer contact product platform. At the same time, management resized the organization to better align operations with the business environment, match demand, and to improve operating efficiency. We also moved more resources closer to our customers, by extending support in Japan, Singapore and South Korea. As the year progressed, the oversupply of memory devices in the market was compounded by lower demand for consumer electronics, further exacerbating production imbalances.

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Products

        Our products are based on our proprietary technologies, including our MicroSpring interconnect technology and design tools. Our MicroSpring interconnect technology, which includes resilient spring-like contact elements, enables us to produce wafer probe cards for applications that require reliability, speed, precision and signal integrity. We manufacture our MicroSpring contact elements through precision micro-machining and scalable semiconductor-like wafer fabrication processes. Our MicroSpring contacts are springs that optimize the relative amounts of force on, and across, a bond pad during the test process and maintain their shape and position over a range of compression. These characteristics allow us to achieve reliable, electrical contact on either clean or oxidized surfaces, including bond pads on a wafer. MicroSpring contacts enable our wafer probe cards to make hundreds of thousands of touchdowns with minimal maintenance for many device applications. The MicroSpring contact can be attached to many surfaces, or substrates, including printed circuit boards, silicon wafers, ceramics and various metalized surfaces.

        Since its original conception, the MicroSpring contact has evolved into a library of spring shapes and technologies. Our designers use this library to design an optimized custom wafer probe card for each customer-unique application. Since developing this fundamental technology, we have broadened and refined it to respond to the increasing requirements of testing smaller, faster and more complex semiconductor devices. We continue to invest in research and development activities around our interconnect technologies, including our micro-electro-mechanical systems, or MEMS, technology, as our MicroSpring contacts have scaled in size with the evolution of semiconductors.

        Our MicroSpring contacts include geometrically precise tip structures. These tip structures are the part of our wafer probe cards that come into physical contact with the devices being tested, and are manufactured using proprietary micro-machining semiconductor-like processes. These tip structures enable precise contact with small bond pad sizes and pitches. Our technology allows for the design of specific geometries of the contact tip that deliver precise and predictable electrical contact for a customer's particular application.

        Our wafer probe cards are custom products that are designed to order for our customers' unique wafer designs. For high parallelism memory test applications, our products require large area contact array sizes because they must accommodate tens of thousands of simultaneous contacts. Our current technology enables probe cards for certain applications to be populated with over 40,000 contacts. This requirement poses fundamental challenges that our technology addresses, including the planarity of the array, the force needed to make contact and the need to touch all bond pads with equal accuracy. We have developed wafer probe cards that use array sizes ranging from 50 mm × 50 mm up to array sizes suitable for contacting all die on a 300 mm wafer simultaneously, in combination with complex multi-layer printed circuit boards that we have designed.

        We have invested and intend to continue to invest considerable resources in our wafer probe card design tools and processes. These tools and processes enable automated routing and trace length adjustment within our printed circuit boards and greatly enhance our ability to rapidly design and lay out complex printed circuit board structures. Our proprietary design tools also enable us to design wafer probe cards particularly suited for testing today's low voltage, high power chips. Low voltage, high frequency chips require superior power supply performance. Our MicroSpring interconnect technology is used to provide a very low inductance, low resistance electrical path between the power source and the chip under test.

        Because our customers typically use our wafer probe cards in a wide range of operating temperatures, as opposed to conducting wafer probe test at one predetermined temperature, we have designed complex thermal compensation characteristics into our products. We select our wafer probe card materials after careful consideration of the potential range of test operating temperatures and design our wafer probe cards to provide for a precise match with the thermal expansion characteristics

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of the wafer under test. As a result, our wafer probe cards are able to accurately probe over a large range of operating temperatures. This feature enables our customers to use the same wafer probe card for both low and high temperature testing without a loss of performance. In addition, for those testing situations that require positional accuracy at a specific temperature, we have designed wafer probe cards optimized for testing at such temperatures.

        We have many spring shapes, different geometrically-precise tip structures, various array sizes and diverse printed circuit board layouts that enable a wide variety of solutions for our customers. Our designers select the most appropriate of these elements, or modify or improve upon such existing elements, and integrate them with our other technologies to deliver a custom solution optimized for the customer's requirements.

        Our technology investment yielded several advances in fiscal 2008. In July, we announced a new technology to enhance probe card performance and productivity. The new technology, known as RapidSoak™ technology, is designed to reduce the time required for the probe card to reach thermal stability. By shortening the time needed to bring a probe card to a desired temperature, RapidSoak technology improves productivity during probe card installation, wafer exchanges, lot changes and probe card maintenance. Maintaining thermal stability also has a positive effect on contact accuracy, since variations in temperature cause expansion and contraction, producing contact alignment challenges.

        In November 2008, we introduced DC-Boost™ technology to help our customers lower their test efficiency by enabling the test of more devices on a single wafer simultaneously. The DC-Boost technology allows our customers to use tester channels more efficiently, increasing test throughput, and extending the life of their existing test equipment. This technology incorporates application specific integrated circuits into our products in order to multiply the number of devices our customers can test in parallel, bringing a new degree of intelligence to the probe card and providing a roadmap for further parallelism improvements on new device designs and tester platforms.

        The Harmony™ eXP full-wafer contact solution was introduced in December 2008, the culmination of several platform improvements to support 300 mm DRAM wafer test requirements. The new Harmony eXP solution incorporates mechanical enhancements to improve planarity (touch all contacts on an even plane), includes a new MicroSpring contactor design to enable pad pitches as small as 60 microns, and allows a 20% reduction in pad size compared to previous generation Harmony products. In combination with certain of our other proprietary technologies, including our RapidSoak technology, the Harmony eXP solution enables our customers to continue their test cost reduction and test technology roadmaps as they transition to smaller devices.

Customers

        Our customers include manufacturers in the DRAM, Flash and SoC markets. Our customers use our wafer probe cards to test DRAM chips including DDR, DDR2, DDR3, SDRAM, PSRAM, mobile DRAM, and Graphic DRAM, NOR and NAND flash memory chips, serial data devices, chipsets, microprocessors and microcontrollers.

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        Three customers accounted for 51.3% of our revenues in fiscal 2008, four customers accounted for 63.0% of our revenues in fiscal 2007, and three customers accounted for 47.3% of our revenues in fiscal 2006, as follows:

*

Less than 10% of revenues.

        Information concerning revenue by geographic region and by country based upon invoicing location appears under "Item 7: Management's Discussion and Analysis of Financial Condition and Results of Operations—Revenues—Revenue by Geographic Region" and Note 12—Operating Segment and Geographic Information of the Notes to our Consolidated Financial Statements, which are included elsewhere in this 10-K.

Backlog

        Our backlog was $40.9 million at December 27, 2008 compared to $46.8 million at December 29, 2007. We manufacture our wafer probe cards based on order backlog and customer commitments. In addition, due to our customers' short delivery time requirements, we at times produce our products in anticipation of demand for our products. Backlog includes only orders for which written authorizations have been accepted and shipment dates within 12 months have been assigned. In addition, backlog includes service revenue for existing product service agreements to be earned within the next 12 months. Customers may delay delivery of products or cancel orders prior to shipment, subject to possible cancellation penalties. Due to possible changes in delivery schedules and cancellations of orders, our backlog on any particular date is not necessarily indicative of actual sales for any succeeding period. Delays in delivery schedules and/or a reduction in backlog during any particular period could have a material adverse effect on our business and results of operations.

Manufacturing

        Our wafer probe cards are custom products that we design to order for our customers' unique wafer designs. We manufacture our products at our facility located in Livermore, California, United States, and we are ramping parts of our manufacturing processes in regions within Asia as part of our global regionalization strategy.

        Another aspect of our global regionalization strategy we are implementing is the movement of operational resources and capabilities to different country regions in Asia to be closer to our customers in order to enhance our customer relationships, improve our responsiveness and increase our product serviceability. The first phase of this strategy was focused on Singapore, where we have established design, sales, procurement and administrative functions. We also established test and assembly manufacturing operations in South Korea in the fourth quarter of 2008. During fiscal 2008, we decided not to proceed with the construction of a new manufacturing facility at our proposed site in Singapore, and in February 2009, we terminated our land lease offer in Singapore and surrendered the land to the lessor. We plan to expand our capabilities in Singapore to include front-end manufacturing processes.

        Our proprietary manufacturing processes include wirebonding, photolithography, plating and metallurgical processes, dry and electro-deposition, and complex interconnection system design. The critical steps in our manufacturing process are performed in a Class 100 clean room environment. We

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also expend considerable resources on the assembly and test of our wafer probe cards and on quality control.

        We depend upon suppliers for some critical components of our manufacturing processes, including ceramic substrates and complex printed circuit boards, and for materials used in our manufacturing processes. Some of these components and materials are supplied by a single vendor. Generally, we rely on purchase orders rather than long-term contracts with our suppliers which subjects us to risks including price increases and component shortages. We continue to evaluate alternative sources of supply for these components and for materials.

        We maintain a repair and service capability in Livermore, California, United States. We also provide repair and service capabilities in our service centers in Gyeonggi-do, South Korea; Dresden, Germany; Yokohama City, Japan and Jubei City, Taiwan.

Research, Development and Engineering

        The semiconductor industry is subject to rapid technological change and new product introductions and enhancements. We believe that our continued commitment to research and development and our timely introduction of new and enhanced wafer probe test solutions and other technologies related to our MicroSpring interconnect technology are integral to maintaining our competitive position. We continue to invest considerable time and resources in creating structured processes for undertaking, tracking and completing our development projects, and plan to implement those developments into new product or technology offerings. We continue to allocate significant resources to these efforts and to use automation and information technology to provide additional efficiencies in our research and development activities.

        Research and development expenses were $65.5 million for fiscal 2008, $61.0 million for fiscal 2007, and $46.6 million for fiscal 2006.

        Our research and development activities, including our product engineering activities, are directed by individuals with significant expertise and industry experience. As of December 27, 2008, we had 199 employees in research and development.

Sales and Marketing

        We sell our products utilizing a proprietary sales model that emphasizes the customer's total cost of ownership as it relates to the costs of test. With this sales model, we strive to demonstrate how test costs can be reduced by simulating the customer's test floor environment, including testers and probers, utilizing our products and comparing the overall cost of test to that of conventional wafer probe cards.

        We sell our products worldwide primarily through our direct sales force, a distributor and three independent sales representatives. As of December 27, 2008, we had 27 sales professionals. In North America, South Korea, Taiwan, Singapore and Japan, we sell our products through our direct sales force. In Europe, our local sales team works with two independent sales representatives and in North America our sales force works with one independent sales representative. In the People's Republic of China, we sell through Spirox Corporation, our regional distributor. We also have the ability to sell our products directly to customers in the People's Republic of China. In July 2008, we terminated our agreement with Spirox for the distribution of our products in Malaysia, Philippines and Singapore and transitioned to a direct sales model in those countries.

        Our marketing staff located in Livermore, California, United States, Jubei City, Taiwan and Tokyo, Japan, works closely with customers to understand their businesses, anticipate trends and define products that will provide significant technical and economic advantages to our customers.

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        We utilize a highly skilled team of field application engineers that support our customers as they integrate our products into their manufacturing processes. Through these customer relationships, we develop a close understanding of customer and product requirements, thereby accelerating our customers' production ramps.

Environmental Matters

        We are subject to U.S. federal, state and local, and foreign governmental laws and regulations relating to the protection of the environment, including those governing the discharge of pollutants into the air and water, the management and disposal of hazardous substances and wastes, the clean-up of contaminated sites and the maintenance of a safe workplace. We believe that we comply in all material respects with the environmental laws and regulations that apply to us, including those of the California Department of Toxic Substances Control, the Bay Area Air Quality Management District, the City of Livermore Water Resources Division and the California Division of Occupational Safety and Health. We received two notices of violation in fiscal 2007 and one notice of violation in the first quarter of fiscal 2008 from the City of Livermore regarding violation of certain applicable waste water discharge limits. For each notice received, we promptly investigated the violation, took what we believed to be appropriate steps to address the cause of the violation, and implemented corrective measures to prevent a recurrence. We implemented additional waste water treatment capability in consultation with the City of Livermore, and purchased additional waste water discharge capacity, which we required as a result of our then increased manufacturing capacity, through the City of Livermore. No provision has been made for loss from environmental remediation liabilities associated with our Livermore facility because we believe that it is not probable that a liability has been incurred as of December 27, 2008.

        While we believe that we are in compliance in all material respects with the environmental laws and regulations that apply to us, in the future, we may receive additional environmental violation notices, and if received, final resolution of the violations identified by these notices could harm our operations, which may adversely impact our operating results and cash flows. New laws and regulations, stricter enforcement of existing laws and regulations, the discovery of previously unknown contamination at our or others' sites or the imposition of new cleanup requirements could also harm our operations, thereby adversely impacting our operating results and cash flows.

Competition

        The highly competitive wafer probe card market is comprised of many domestic and foreign companies, and has historically been fragmented with many local suppliers servicing individual customers. Our current and potential competitors in the wafer probe card market include Advantest Corporation, Aehr Test Systems, AMST Co., Ltd., Cascade Microtech, Inc., Feinmetall GmbH, Korea Instrument Co., Ltd., Japan Electronic Materials Corporation, SV Probe, Inc., Micronics Japan Co., Ltd., Microfriend Inc., Technoprobe Asia Pte. Ltd., MicroProbe, Inc., Phicom Corporation, Tokyo Cathode Laboratory Co., Ltd., Tokyo Electron Ltd., Touchdown Technologies, Inc., TSE Co., Ltd. and Wentworth Laboratories, Inc., among others. In addition to the ability to address wafer probe card performance issues, the primary competitive factors in the industry in which we compete include product quality and reliability, price, total cost of ownership, lead times, the ability to provide prompt and effective customer service, field applications support and timeliness of delivery.

        Some of our competitors are also suppliers of other types of test equipment or other semiconductor equipment, or offer both advanced wafer probe cards and needle probe cards, and may have greater financial and other resources than we do. We expect that our competitors will enhance their current wafer probe products and that they may introduce new products that will be competitive with our wafer probe cards. In addition, it is possible that new competitors, including test equipment manufacturers, may offer new technologies that reduce the value of our wafer probe cards.

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        Additionally, semiconductor manufacturers may implement chip designs that include built-in self-test capabilities or similar functions or methodologies that increase test throughput and eliminate some or all of our current competitive advantages. Our ability to compete favorably may also be adversely affected by (1) low volume orders that do not meet our present minimum volume requirements, (2) very short cycle time requirements which may be difficult for us to meet, (3) long-standing relationships between our competitors and certain semiconductor manufacturers, and (4) semiconductor manufacturer test strategies that include low performance semiconductor testers.

Intellectual Property

        Our success depends in part upon our ability to continue to innovate and invest in research and development to meet the semiconductor testing requirements of our customers, to maintain and protect our proprietary technology and to conduct our business without infringing the proprietary rights of others. We rely on a combination of patents, trade secrets, trademarks and contractual restrictions on disclosure to protect our intellectual property rights.

        As of December 27, 2008, we had 547 issued patents, of which 282 are United States patents and 265 are foreign patents. The expiration dates of these patents range from 2013 to 2027. Our issued patents cover many of the features of our interconnect technology, as well as some of our inventions related to wafer probe cards and testing, wafer-level packaging and test, sockets and assemblies and chips. In addition, as of December 27, 2008, we had 597 patent applications pending worldwide, including 171 United States applications, 426 foreign national or regional stage applications and 27 Patent Cooperation Treaty applications. We cannot provide any assurance that our current patent applications, or any future patent applications that we may file, will result in a patent being issued with the scope of the claims we seek, or at all, or whether any patents that we may obtain will not be challenged or invalidated. Even if additional patents are issued, our patents might not provide sufficiently broad coverage to protect our proprietary rights or to avoid a third party claim against one or more of our products or technologies.

        We have both registered and unregistered trademarks, including FormFactor, DC-Boost, Harmony, MicroSpring, MicroForce, MicroLign, RapidSoak, TRE, TrueScale and the FormFactor logo.

        We routinely require our employees, customers, suppliers and potential business partners to enter into confidentiality and non-disclosure agreements before we disclose to them any sensitive or proprietary information regarding our products, technology or business plans. We require our employees to assign to us proprietary information, inventions and other intellectual property they create, modify or improve.

        Legal protections afford only limited protection for our proprietary rights. We also may not be successful in our efforts to enforce our proprietary rights. To date, for example, we have been unsuccessful in our efforts to enforce certain of our patent rights in South Korea. Notwithstanding our efforts to protect our proprietary rights, unauthorized parties may attempt to copy aspects of our products or to obtain and use information that we regard as proprietary. From time to time, we have become aware of situations where others are or may be infringing on our proprietary rights. We evaluate these situations as they arise and elect to take actions against these companies as we deem appropriate. Others might independently develop similar or competing technologies or methods or design around our patents, or attempt to manufacture and sell infringing products in countries that do not strongly enforce intellectual property rights or hold invalid our intellectual property rights. In addition, leading companies in the semiconductor industry have extensive patent portfolios and other intellectual property with respect to semiconductor technology. Actions have been filed in the U.S. Patent and Trademark Office and patent offices in other countries, challenging the validity of certain of our patents. In the future, we might receive claims that we are infringing intellectual property rights of others or that our patents or other intellectual property rights are invalid. We have received in the past,

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and may receive in the future, communications from third parties inquiring about our interest in licensing certain of their intellectual property or more generally identifying intellectual property that may be of interest to us.

        We have invested significant time and resources in our technology and as a part of our ongoing efforts to protect the intellectual property embodied in our proprietary technologies, including our MicroSpring interconnect technology and design processes, we may pursue actions to enforce our intellectual property rights against infringing third parties.

        For a description of the material patent-related proceedings in which we are involved, see "Item 3: Legal Proceedings".

Employees

        As of December 27, 2008, we had 940 regular full-time employees, including 199 in research and development, 125 in sales and marketing, 106 in general and administrative functions, and 510 in operations. By region, 785 of our employees were in North America, 56 in Japan, 21 in Taiwan, 36 in South Korea, 26 in Singapore, and 16 in Europe. No employees are currently covered by a collective bargaining agreement. We believe that our relations with our employees are good.

        In January 2009, we announced a global reorganization and cost reduction plan that reduced our global workforce. We had 784 regular full-time employees after the January 2009 global reorganization.

Available Information

        We maintain a website at http://www.formfactor.com. We make available free of charge on our website our annual report on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K and amendments to those reports filed or furnished pursuant to Section 13(a) or 15(d) of the Exchange Act, as soon as reasonably practicable after we electronically file such material with, or furnish it to, the SEC. The reference to our website does not constitute incorporation by reference of the information contained at the site.

        The public may also read and copy any materials that we file with the SEC at the SEC's Public Reference Room at 100 F Street N.E., Washington, D.C. 20549. The public may obtain information on the operation of the Public Reference Room by calling the SEC at 1-800-SEC-0330. The SEC also maintains an Internet website that contains reports and other information regarding issuers, such as FormFactor, that file electronically with the SEC. The SEC's Internet website is located at http://www.sec.gov.

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Directors and Executive Officers

        Directors.    The names of the members of our board of directors, their ages as of December 27, 2008 and their current occupations are set forth below.

        Dr. Homa Bahrami has served as a Director since December 2004. Dr. Bahrami is a Senior Lecturer at the Haas School of Business, University of California at Berkeley. Dr. Bahrami has been on the Haas School faculty since 1986 and is widely published on organizational design and organizational development challenges and trends in the high technology sector. Dr. Bahrami currently serves on the board of directors of one privately held company. Dr. Bahrami holds a Ph.D. in organizational behavior from Aston University, United Kingdom.

        Dr. Thomas J. Campbell has served as a Director since January 2006. Dr. Campbell previously served as a Director from July 2003 through November 2004, when he resigned to become the Director of Finance for the State of California. Dr. Campbell has served as a professor at the Haas School of Business since August 2002. Dr. Campbell is currently on leave from the University of California at Berkeley to serve as Presidential Fellow and Distinguished Visiting Professor of Law at Chapman University in Orange, California. Dr. Campbell was the Dean of the Haas School of Business at the University of California at Berkeley from August 2002 to July 2008, taking a leave of absence from this post when he became California Director of Finance. Dr. Campbell was the California Director of Finance from December 2004 through November 2005. Dr. Campbell was a professor at Stanford Law School from 1983 to August 2002. Dr. Campbell served as a U.S. congressman from 1989 to 1993 and from 1995 to January 2001, and as a California state senator from 1993 to 1995. Dr. Campbell also served as Director of the Federal Trade Commission's Bureau of Competition from 1981 to 1983. Dr. Campbell serves on the board of directors of Visa Inc., a publicly traded company, where he is Chairman of the Governance Committee and a member of the Compensation Committee. Dr. Campbell holds a B.A., an M.A. and a Ph.D. in economics from the University of Chicago, and a J.D. from Harvard Law School.

        G. Carl Everett, Jr. has served as a Director since June 2001. Mr. Everett founded GCE Ventures, a venture advisement firm, in April 2001. Mr. Everett has served as a partner at Accel LLP, a venture capital firm, since 2002. From February 1998 to April 2001, Mr. Everett served as Senior Vice President, Personal Systems Group of Dell Inc. During 1997, Mr. Everett was on a personal sabbatical. From 1978 to December 1996, Mr. Everett held several management positions with Intel Corporation, including Senior Vice President and General Manager of the Microprocessor Products Group, and Senior Vice President and General Manager of the Desktop Products Group. Mr. Everett currently

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serves on the board of directors of three privately held companies. Mr. Everett holds a B.A. in business administration and a Doctorate of laws from New Mexico State University.

        Dr. Igor Y. Khandros founded FormFactor in April 1993. Dr. Khandros has served as Chairman of our Board of Directors since June 2008 and as a Director since our company's founding. Dr. Khandros served as our Chief Executive Officer from April 1993 to June 2008. Dr. Khandros also served as our President from April 1993 to November 2004. From 1990 to 1992, Dr. Khandros served as the Vice President of Development of Tessera Technologies, Inc., a provider of chip scale packaging technology that he co-founded. From 1986 to 1990, he was employed at the Yorktown Research Center of IBM Corporation as a member of the technical staff and a manager. From 1979 to 1985, Dr. Khandros was employed at ABEX Corporation, a casting foundry and composite parts producer, as a research metallurgist and a manager, and he was an engineer from 1977 to 1978 at the Institute of Casting Research in Kiev, Ukraine. Dr. Khandros holds an M.S. equivalent degree in metallurgical engineering from Kiev Polytechnic Institute in Kiev, Ukraine, and a Ph.D. in metallurgy from Stevens Institute of Technology.

        Lothar Maier has served as a Director since November 2006. Mr. Maier has served as the Chief Executive Officer and a member of the board of directors of Linear Technology Corporation, a supplier of high performance analog integrated circuits, since January 2005. Prior to that, Mr. Maier served as Linear Technology's Chief Operating Officer from April 1999 to December 2004. Before joining Linear Technology, Mr. Maier held various management positions at Cypress Semiconductor Corporation, a provider of high-performance, mixed-signal, programmable solutions, from 1983 to 1999, most recently as Senior Vice President and Executive Vice President of Worldwide Operations. Mr. Maier holds a B.S. in chemical engineering from the University of California at Berkeley.

        James A. Prestridge has served as a Director since April 2002 and has served as our Lead Independent Director since June 2008. Mr. Prestridge served as Chairman of our Board of Directors from August 2005 to June 2008. Mr. Prestridge served as a consultant for Empirix Inc., a provider of test and monitoring solutions for communications applications, from October 2001 until October 2003. From June 1997 to January 2001, Mr. Prestridge served as a Director of five private companies that were amalgamated into Empirix. Mr. Prestridge served as a director of Teradyne, Inc., a manufacturer of automated test equipment, from 1992 until 2000. Mr. Prestridge was Vice-Chairman of Teradyne from January 1996 until May 2000 and served as Executive Vice President of Teradyne from 1992 until May 1997. Mr. Prestridge holds a B.S. in general engineering from the U.S. Naval Academy and an M.B.A. from Harvard University. Mr. Prestridge served as a Captain in the U.S. Marine Corps.

        Dr. Mario Ruscev has served as our Chief Executive Officer since June 2008 and a member of our board of directors since January 2008, when he joined our company. Dr. Ruscev previously served as our President from January 2008 to June 2008. Prior to FormFactor, Dr. Ruscev served as President of Testing Schlumberger Oilfield Services of Schlumberger Limited, a services company supplying technology, project management and information solutions for optimizing performance in the oil and gas industry, from April 2006 to December 2007. He also held several executive positions at Schlumberger during his 23 year career with that company, including President of Schlumberger Water and Carbon Services from April 2002 to March 2006, President of Wireline Schlumberger Oilfield Services from January 2001 to March 2002 and President of Geco-Prakla Schlumberger Oilfield Services from April 1999 to December 2000. Dr. Ruscev received a Doctorate in Nuclear Physics from Université, Pierre et Marie Curie in Paris, France and a Ph.D. in Nuclear Physics from Yale University.

        Harvey A. Wagner has served as a Director since February 2005. Mr. Wagner joined Caregiver Services, Inc., a provider of in-home care services, as the President and Chief Executive Officer and a member of the board of directors on April 7, 2008. Mr. Wagner founded the H.A. Wagner Group, LLC, a consulting firm, where he has served as managing principal since July 2007. Mr. Wagner previously served as President and Chief Executive Officer of Quovadx, Inc. (now Healthvision, Inc.), a

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software and services company, from October 2004 to July 2007, and as a member of the board of directors of Quovadx from April 2004 to July 2007. From May 2004 through October 2004, Mr. Wagner served as acting President and Chief Executive Officer of Quovadx. Prior to joining Quovadx, he served as Executive Vice President and Chief Financial Officer of Mirant Corporation, an independent energy company, from January 2003 through April 2004. Prior to joining Mirant, Mr. Wagner was Executive Vice President of Finance, Secretary, Treasurer, and Chief Financial Officer at Optio Software, Inc., a provider of business process improvement solutions, from February 2002 to December 2002. From May 2001 to January 2002, he performed independent consulting services for various corporations. He was Chief Financial Officer and Chief Operating Officer for PaySys International, Inc. from December 1999 to April 2001. Mr. Wagner also serves on the board of directors of Cree, Inc., a publicly traded company, where he is Chairman of the Audit Committee and a member of the Nominating and Governance Committee. Mr. Wagner serves on the Board of Startek, Inc., a publicly traded company, where he is Chairman of the Audit Committee, a member of the Governance Committee and a member of the Compensation Committee. Mr. Wagner holds a B.B.A. in accounting from the University of Miami.

        Executive Officers.    Our executive officers in fiscal 2008, their ages as of December 27, 2008 and their positions with our company in fiscal 2008 are set forth below.

        Dr. Mario Ruscev has served as our Chief Executive Officer since June 2008 and a member of our board of directors since January 2008, when he joined our company. Dr. Ruscev previously served as our President from January 2008 to June 2008. Prior to FormFactor, Dr. Ruscev served as President of Testing Schlumberger Oilfield Services of Schlumberger Limited, a services company supplying technology, project management and information solutions for optimizing performance in the oil and gas industry, from April 2006 to December 2007. He also held several executive positions at Schlumberger during his 23 year career with that company, including President of Schlumberger Water and Carbon Services from April 2002 to March 2006, President of Wireline Schlumberger Oilfield Services from January 2001 to March 2002 and President of Geco-Prakla Schlumberger Oilfield Services from April 1999 to December 2000. Dr. Ruscev received a Doctorate in Nuclear Physics from Université, Pierre et Marie Curie in Paris, France and a Ph.D. in Nuclear Physics from Yale University.

        Jean B. Vernet joined our company in March 2008, as Chief Financial Officer and Senior Vice President. Mr. Vernet previously served as the Director of Risk and Assistant Treasurer at Rio Tinto Alcan, one of five product groups of Rio Tinto plc, a leading international mining group from July 2007 to March 2008. Prior to joining Rio Tinto, Mr. Vernet worked for more than 10 years at Schlumberger Limited, a services company supplying technology, project management and information solutions for optimizing performance in the oil and gas industry, from October 1996 to June 2007, where he held several key leadership positions, including Finance Director and Controller of the REW Wireline Business Unit and Corporate R&D, from July 2004 to June 2007 and Treasurer of Atlantic Asia from January 2003 to June 2004, as well as various risk management and treasury roles. Mr. Vernet holds a M.S. degree in mechanical engineering from the École Centrale de Lyon in France an M.B.A in analytic finance and accounting from the University of Chicago and a B.S. equivalent in mathematics and physics from Lycée Janson de Sailly in France.

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        Richard M. Freeman has served as our Senior Vice President, Manufacturing since January 2009. Mr. Freeman previously served as our Senior Vice President Operations from September 2004 to December 2008. Mr. Freeman previously served as Chief Operating Officer at ChipPAC Inc. a provider of semiconductor packaging, design, assembly, test and distribution services from November 2000 to December 2003. He also served as Senior Vice President of Manufacturing for Cypress Semiconductor Corporation, from April 1999 to November 2000. Prior to this, Mr. Freeman spent over 20 years in semiconductor manufacturing at National Semiconductor Corporation and Fairchild Semiconductor International, Inc., the last position as Vice President of Worldwide Wafer Manufacturing. Mr. Freeman holds a M.S. degree in chemistry from the University of Arizona and a B.S. degree in chemistry from Michigan Technological University.

        Stuart L. Merkadeau has served as one of our Senior Vice Presidents since October 2003 and as our General Counsel and Secretary since October 2002. Mr. Merkadeau previously served as one of our Vice Presidents from October 2002 to September 2003, and as our Vice President of Intellectual Property from July 2000 to October 2002. From 1990 to July 2000, Mr. Merkadeau practiced law as an associate and then a partner with Graham & James LLP, where he specialized in licensing and strategic counseling in intellectual property matters. Mr. Merkadeau is admitted to practice in California and registered to practice before the U.S. Patent and Trademark Office. Mr. Merkadeau holds a B.S. in industrial engineering from Northwestern University and a J.D. from the University of California at Los Angeles.

Item 1A:    Risk Factors

        You should carefully consider the following risk factors, as well as the other information in this Annual Report on Form 10-K, in evaluating FormFactor and our business. If any of the following risks actually occur, our business, financial condition and results of operations would suffer, the trading price of our common stock could decline and you may lose all or part of your investment in our common stock.

Our operating results are likely to fluctuate, which could cause us to miss market analyst or investor expectations and cause the trading price of our common stock to decline.

        Our operating results have fluctuated in the past and are likely to continue to fluctuate. As a result, we believe you should not rely on period-to-period comparisons of our financial results as indicators of our future performance. Some of the important factors that could cause our revenues, operating results and outlook to fluctuate from period-to-period include:

•

customer demand for and adoption of our products;



•

market and competitive conditions in our industry, the semiconductor industry and the economy as a whole;



•

our ability to improve operating efficiency to achieve operating cash flow break even in the current business environment and to better position our company for long-term, profitable growth;



•

the timing and success of new technologies and product introductions by our competitors and by us;



•

our ability to deliver reliable, cost-effective products that meet our customers' testing requirements in a timely manner;



•

our ability to bring new products into volume production on time and at acceptable yields and cost;

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•

our ability to implement measures for enabling efficiencies and supporting growth in our design, applications, manufacturing and other operational activities;



•

the reduction, rescheduling or cancellation of orders by our customers;



•

our ability to collect accounts receivables owed by our customers;



•

our product and customer sales mix and geographical sales mix;



•

a reduction in the price or the profitability of our products;



•

the availability or the cost of components and materials utilized in our products;



•

our ability to efficiently optimize manufacturing capacity and to stabilize production yields and as necessary to meet customer demand, ramp production volume at our manufacturing facilities;



•

our ability to successfully implement our global regionalization strategy, which includes locating certain operational capabilities and resources in the specific countries where our customers are located;



•

our ability to protect our intellectual property against third parties and continue our investment in research and design activities;



•

our ability to obtain tax and other cost advantages from our expansion of operations into Singapore;



•

any disruption in the operation of our manufacturing facility;



•

the timing of and return on our investments in research and development; and



•

seasonality, principally due to our customers' purchasing cycles.

        The impact of one or more of these factors might cause our operating results to vary widely. If our revenues, operating results or outlook fall below the expectations of market analysts or investors, the market price of our common stock could decline substantially.

Cyclicality in the semiconductor industry is currently adversely impacting our sales and may do so in the future, and as a result we would experience reduced revenues and operating results.

        The semiconductor industry has historically been cyclical and is characterized by wide fluctuations in product supply and demand. From time to time, this industry has experienced significant downturns, often in connection with, or in anticipation of, maturing product and technology cycles, excess inventories and declines in general economic conditions. The current global economic and semiconductor downturns are causing our operating results to decline dramatically from one period to the next. For example, our revenues in the fourth quarter of fiscal 2008 declined by 66.9% compared to our revenues for the fourth quarter of fiscal 2007 due in significant part to continuing challenges in semiconductor market conditions, particularly in the DRAM and Flash markets, and we cannot provide any assurance when semiconductor market conditions will improve. Our business depends heavily upon the development and manufacture of new semiconductors, the rate at which semiconductor manufacturers make transitions to smaller nanometer technology nodes and implement tooling cycles, the volume of production by semiconductor manufacturers and the overall financial strength of our customers, which, in turn, depend upon the current and anticipated market demand for semiconductors and products, such as personal computers and cell phones, that use semiconductors. Semiconductor manufacturers generally sharply curtail their spending, including their equipment spending, and defer their adoption of emerging technologies during industry downturns and historically have lowered their spending disproportionately more than the decline in their revenues. This is particularly true when there is a point during an industry cycle in which the semiconductor manufacturers' costs related to semiconductor devices approach or exceed the sales price of the devices. As a result, we would

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experience reduced revenues due to the decreased demand for our wafer probe cards by our semiconductor manufacturer customers, which is what we are experiencing in this current downturn. Accordingly, if we are unable to adjust our levels of manufacturing and human resources or manage our costs and deliveries from suppliers in response to lower spending by semiconductor manufacturers, our gross margin may continue to decline and cause us to experience further operating losses.

If we do not effectively restructure our operations for the current global economic and semiconductor downturns and to better position our company for long-term, profitable growth, we might not succeed.

        During an extended period of rapid growth and expansion over the last several years, we primarily focused on growing capacity and meeting customer mission-critical needs. With the current global economic and semiconductor downturns, we are now focusing on improving our operating efficiency to achieve operating cash flow break even in the current business environment and to better position our company for long-term, profitable growth. The timing, length and severity of the cycles in the semiconductor industry are difficult to predict. This cyclicality affects our ability to accurately predict our future operating results and plan our business, and could also impair the value of our tangible and intangible assets. If we do not successfully implement our global cost reduction plan and other measures for optimizing our financial model for prevailing market conditions, our competitiveness could be seriously harmed, our ability to invest in our business for future growth may be negatively impacted and our company might not succeed. If we do not successfully restructure our operations by, for example, placing more decision-making in regions close to our customers to enhance customer relationships, strengthening our local design, application and service capabilities to improve customer responsiveness, changing our manufacturing structure for shorter cycle time and improved product delivery capabilities, and realigning our research and development efforts, and continue to motivate and retain our key employees, we may experience continued deterioration in our business and our company might not succeed. In addition, as the business environment improves, if we are unable to proactively and effectively manage our operations and/or realign our controls, systems and infrastructure to changing business conditions, we may not be in a position to boost our personnel, manufacturing capacity, service capabilities and productivity, and support growth in response to increasing customer demand for our products, which would, in turn, have a negative impact on our operating results. Adverse general economic conditions may also impair the recovery of our business.

The recent financial crisis could negatively affect our business, results of operations, and financial condition.

        The recent financial crisis affecting the banking system and financial markets and the going concern threats to financial institutions have resulted in a tightening in the credit markets; a low level of liquidity in many financial markets; and extreme volatility in credit, fixed income, and equity markets. There could be a number of follow-on effects from the credit crisis on our business, including a reduction in demand for consumer and other products incorporating devices tested with our wafer probes, which in turn could cause our customers to curtail their capital expenditures and to defer their adoption of emerging technologies, the insolvency of key suppliers, resulting in product delays, increased expense, and increased impairment charges due to declines in the fair values of marketable debt. Further, a prolonged downturn could result in one or more of our customers filing for bankruptcy protection or insolvency proceedings, which could negatively impact our ability to collect accounts receivables and realize revenue for product shipped to such customers. For example, in fiscal 2009, customers, Spansion Japan, Inc., Qimonda AG, and Qimonda Richmond, LLC filed such actions in Japan, Germany, and North America, respectively. Continued turbulence in the U.S. and international markets and economies may adversely affect our liquidity and financial condition, and the liquidity and financial condition of our customers.

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If we are unable to efficiently manufacture and ramp production of our new probe card products, our business may be materially adversely affected.

        We must continuously improve our manufacturing processes in an effort to increase yields and product performance, lower our costs and reduce the time it takes for us to design, manufacture and deliver our products in volume. If we cannot, our new products may not be commercially successful, our revenues may be adversely affected, our customer relationships and our reputation may be harmed, and our business may be materially adversely affected. To improve our manufacturing processes, we have incurred and may incur in the future substantial costs as we optimize capacity and yields, implement new manufacturing technologies, methods and processes, purchase new equipment, upgrade existing equipment and train technical personnel. We have experienced and may experience in the future manufacturing delays and other inefficiencies in connection with implementation of these improvements and customer qualifications of new processes, and expansion of manufacturing capacity and ramp of production volume to meet customer demand, which could cause our operating results to decline. We have also experienced and may experience in the future difficulties in manufacturing our complex products in volume on time and at acceptable yields and cost and installation issues in the field due to complexity of customer design requirements, including integration of wafer probe cards with varying customer test cell environments and testing of semiconductor devices over a wide temperature range. For example, we experienced challenges transitioning our Harmony architecture-based products from a lower-volume, engineering-assisted process to a high-volume manufacturing process. These problems have resulted and could result in the future in missed opportunities with customers. Any continued difficulties could cause additional product delivery delays and lost sales. This increases our vulnerability to our competitors and the likelihood that our customers will seek solutions from other suppliers or to develop solutions themselves. If demand for our products decreases, we could have excess manufacturing capacity. The fixed costs associated with excess manufacturing capacity could cause our operating results to decline. If we are unable to achieve further manufacturing efficiencies and cost reductions, particularly if we are experiencing pricing pressures in the marketplace, our operating results could suffer.

We derive a substantial portion of our revenues from a small number of customers, and our revenues could decline significantly if any major customer does not place, cancels, reduces or delays a purchase of our products, or does not pay us.

        A relatively small number of customers has accounted for a significant portion of our revenues in any particular period. Three customers accounted for 51.3% of our revenues in fiscal 2008, and four customers accounted for 63.0% of our revenues in fiscal 2007. In fiscal 2008 and in fiscal 2007, our ten largest customers accounted for 81.0% and 90.7%, respectively, of our revenues. We anticipate that sales of our products to a relatively small number of customers will continue to account for a significant portion of our revenues. The cancellation, reduction or deferral of even a small number of purchases of our products could significantly reduce our revenues in any particular quarter. Cancellations, reductions or deferrals could result from a downturn in the semiconductor industry, manufacturing delays, quality or reliability issues with our products, or interruptions to our customers' operations due to fire, natural disasters or other events. Furthermore, because our probe cards are custom products designed for our customers' unique wafer designs, any cancellations, reductions or delays may result in significant, non-recoverable costs. In some situations, our customers might be able to cancel or reduce orders without a significant penalty. Our customers could also fail to pay all or part of an invoice for our products. In the current global economic and semiconductor industry downturns, we are more exposed to this non-payment risk because of concerns regarding the financial viability of certain semiconductor manufacturers. For example, in the fourth quarter of fiscal 2008, we recorded a $4.1 million pre-tax expense to increase our allowance for bad debts as a result of the heightened non-payment risk of accounts receivable primarily related to one customer and on February 20, 2009, we filed a complaint in a California state superior court against Spansion, LLC in which we are

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seeking, among other things, payment of approximately $8.1 million for probe cards purchased by and delivered to Spansion. We may be unable to recognize revenue and we may incur additional charges for bad debt reserve to the extent certain of our customers continue to face financial difficulties during this downturn. Customers with financial difficulties may be forced to materially reduce or discontinue operations, file for bankruptcy or other relief, or may be acquired by one of our other customers, any of which would further reduce our customer base.

Industry consolidation may increase our business risk.

        Consolidation in the semiconductor industry, particularly among manufacturers of DRAM, could reduce our customer base, lead to lost or delayed sales and reduced demand for our wafer probe cards and result in increased pricing pressures. Additionally, certain customers may not want to rely entirely or substantially on a single wafer probe card supplier and, as a result, such customers could reduce their purchases of our wafer probe cards.

If we do not innovate and keep pace with technological developments in the semiconductor industry, our products might not be competitive and our revenues and operating results could suffer.

        We must continue to innovate and to invest in research and development to improve our competitive position and to meet the testing requirements of our customers. Our future growth depends, in significant part, upon our ability to work effectively with and anticipate the testing needs of our customers and to develop and support new products and product enhancements to meet these needs on a timely and cost-effective basis. Our customers' testing needs are becoming more challenging as the semiconductor industry continues to experience rapid technological change driven by the demand for complex circuits that are shrinking in size and at the same time are increasing in speed and functionality and becoming less expensive to produce. Examples of trends driving demand for technological research and development include semiconductor manufacturers' transitions to 70 and below nanometer technology nodes, to one gigabit density devices, to Double Data Rate II, or DDR II, architecture devices, and to Double Data Rate III, or DDR III, architecture devices. Our customers expect that they will be able to integrate our wafer probe cards into any manufacturing process as soon as it is deployed. Therefore, to meet these expectations and remain competitive, we must continually design, develop and introduce on a timely basis new products and product enhancements with improved features. Successful product design, development and introduction on a timely basis require that we:

•

design innovative and performance-enhancing product architectures, technologies and features that differentiate our products from those of our competitors;



•

transition our products to new manufacturing technologies;



•

identify emerging technological trends in our target markets;



•

maintain effective marketing strategies;



•

respond effectively to technological changes or product announcements by others; and



•

adjust to changing market conditions quickly and cost-effectively.

        Not only do we need the technical expertise to implement the changes necessary to keep our technologies current, but we must also rely heavily on the judgment of our management to anticipate future market trends. If we are unable to timely predict industry changes, or if we are unable to modify our products on a timely basis, we might lose customers or market share. In addition, we might not be able to recover our research and development expenditures, which could harm our operating results.

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We depend upon the sale of our wafer probe cards for substantially all of our revenues, and the majority of our wafer probe cards are utilized by semiconductor manufacturers for testing DRAM devices; if we continue to experience a downturn in demand for our DRAM products, our revenues could decline further.

        We have historically derived substantially all of our revenues from the sale of our wafer probe cards to manufacturers of DRAM, flash memory devices, and microprocessor, chipset and other SoC devices. For fiscal 2008 and for fiscal 2007, sales to manufacturers of DRAM devices accounted for 66.4% and 70.9%, respectively, of our revenues, sales to manufacturers of flash memory devices accounted for 18.3% and 19.2%, respectively, of our revenues, and sales to manufacturers of SoC devices accounted for 15.3% and 9.8%, respectively, of our revenues. We anticipate that sales of our wafer probe cards will represent a substantial majority of our revenues for the foreseeable future. Our success depends in large part upon the continued acceptance of our products within these markets and our ability to continue to develop and introduce new products that meet our customers' requirements on a timely basis for these markets. In particular, to continue to grow our business, we need to further penetrate the full wafer contactor flash memory and SoC, markets and to gain additional market share with manufacturers of flash memory and SoC devices. To the extent that we are unable to realize cost reductions and manufacturing efficiencies in the production of our wafer probe cards or if we are not able to timely deliver our products, our revenues and business operations could be adversely impacted and our ability to grow could suffer. As our next generation wafer probe cards are used in greater volume in commercial production, it is possible that we will identify certain areas of technical performance that require improvement and if we are unable to continually, efficiently and in a timely manner improve our products, our operating results could be harmed. If chip manufacturers fail to make architecture, node or technology transitions as we anticipate, or if anticipated or announced transitions are delayed, it could adversely impact our revenues and operating results. In addition, we might not be able to sustain or increase our revenues from sales of our wafer probe cards, particularly if conditions in the semiconductor market continue to deteriorate or do not improve or if the market enters into another downturn. Any decrease in revenues from sales of our wafer probe cards could harm our business more than it would if we offered a more diversified line of products.

The markets in which we participate are competitive, and if we do not compete effectively, our operating results could be harmed.

        We are experiencing increased competition in the wafer probe card market and we expect competition to intensify in the future. Increased competition has resulted and in the future is likely to result in price reductions, reduced gross margins or loss of market share. Competitors might introduce new competitive products for the same markets that our products currently serve. These products may have better performance, lower prices and/or broader acceptance than our products. In addition, for products such as wafer probe cards, semiconductor manufacturers typically qualify more than one source, to avoid dependence on a single source of supply. As a result, our customers will likely purchase products from our competitors. Current and potential competitors include Advantest Corporation, Aehr Test Systems, AMST Co., Ltd., Cascade Microtech, Inc., Feinmetall GmbH, Japan Electronic Materials Corporation, Korea Instrument Co., Ltd., SV Probe Inc., Micronics Japan Co., Ltd., Microfriend Inc., MicroProbe Inc., Phicom Corporation, and Technoprobe Asia Pte. Ltd., Tokyo Cathode Laboratory Co., Ltd., Tokyo Electron, Ltd., Touchdown Technologies, Inc., TSE Co., Ltd. and Wentworth Laboratories, Inc., among others. Many of our current and potential competitors have greater name recognition, larger customer bases, more established customer relationships or greater financial, technical, manufacturing, marketing and other resources than we do. As a result, they might be able to respond more quickly to new or emerging technologies and changes in customer requirements, devote greater resources to the development, promotion, sale and support of their products, and reduce prices to increase market share. Some of our competitors also supply other types of test equipment, or offer both advanced wafer probe cards and needle probe cards. Those competitors that offer both advanced wafer probe cards and needle probe cards might have strong,

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existing relationships with our existing customers or with potential customers. Because we do not offer a needle probe card or other conventional technology wafer probe card for less advanced applications, it may be difficult for us to introduce our advanced wafer probe cards to these customers and potential customers for certain wafer test applications. It is possible that existing or new competitors, including test equipment manufacturers, may offer new technologies that reduce the value of our wafer probe cards.

If our relationships with our customers and companies that manufacture semiconductor test equipment deteriorate, our product development activities could be harmed.

        The success of our product development efforts depends upon our ability to anticipate market trends and to collaborate closely with our customers and with companies that manufacture semiconductor test equipment. Our relationships with these customers and companies provide us with access to valuable information regarding manufacturing and process technology trends in the semiconductor industry, which enables us to better plan our product development activities. These relationships also provide us with opportunities to understand the performance and functionality requirements of our customers, which improve our ability to customize our products to fulfill their needs. Our relationships with test equipment companies are important to us because test equipment companies can design our wafer probe cards into their equipment and provide us with the insight into their product plans that allows us to offer wafer probe cards for use with their products when they are introduced to the market. Our relationships with our customers and test equipment companies could deteriorate if they:

•

become concerned about our ability to protect their intellectual property;



•

become concerned with our ability to deliver quality products on a timely basis;



•

develop their own solutions to address the need for testing improvement;



•

implement chip designs that include enhanced built-in self-test capabilities;



•

regard us as a competitor;



•

introduce their own wafer probe card product;



•

establish relationships with others in our industry;



•

acquire or invest in a competitive wafer probe card manufacturer or enter into a business venture with a competitive wafer probe card manufacturer; or



•

attempt to restrict our ability to enter into relationships with their competitors.

        Many of our customers and the test equipment companies we work with are large companies. The consequences of deterioration in our relationship with any of these companies could be exacerbated due to the significant influence these companies can exert in our markets. If our current relationships with our customers and test equipment companies deteriorate, or if we are unable to develop similar collaborative relationships with important customers and test equipment companies in the future, our long-term ability to produce commercially successful products could be impaired.

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Because we generally do not have a sufficient backlog of unfilled orders to meet our quarterly revenue targets, revenues in any quarter are substantially dependent upon customer orders received and fulfilled in that quarter.

        Our revenues are difficult to forecast because we generally do not have a sufficient backlog of unfilled orders to meet our quarterly revenue targets at the beginning of a quarter. Rather, a substantial percentage of our revenues in any quarter depends upon customer orders for our wafer probe cards that we receive and fulfill in that quarter. Because our expense levels are based in part on our expectations as to future revenues and to a large extent are fixed in the short term, we might be unable to adjust spending in time to compensate for any unexpected shortfall in revenues. Accordingly, any significant shortfall of revenues in relation to our expectations could hurt our operating results.

If semiconductor manufacturers do not migrate elements of final test to wafer probe test, market acceptance of other applications of our technology could be delayed.

        We intend to continue to work with certain of our customers to migrate elements of final test from the device level to the wafer level and to engage in such activities with other and new customers. This migration will involve a change in semiconductor test strategies from concentrating final test at the individual device level to increasing the amount of test at the wafer level. Semiconductor manufacturers typically take time to qualify new strategies that affect their testing operations. As a result, general acceptance of wafer-level final test might not occur in the near term or at all. In addition, semiconductor manufacturers might not accept and use wafer-level final test in a way that uses our technology or our technology capabilities to perform elements of final test on the wafer may not scale with the needs of semiconductor manufacturers. If the migration of elements of final test to wafer probe test does not grow as we anticipate, or if semiconductor manufacturers do not adopt our technology for their wafer probe test requirements, market acceptance of other applications for our technology could be delayed. In addition, if various manufacturers do not elect to invest in wafer test technology enabling the identification of known good die, or KGD, or if the projected or anticipated investment in such technology is delayed or reduced, it could delay the introduction of certain of our technologies and negatively impact our business.

Changes in test strategies, equipment and processes could cause us to lose revenues.

        The demand for wafer probe cards depends in large part upon the number of semiconductor designs, technology and architecture transitions in chip designs, and the overall semiconductor unit volume. The time it takes to test a wafer depends upon the number of devices being tested, the complexity of these devices, the test software program and the test equipment itself. As test programs become increasingly effective and test throughput increases, the number of wafer probe cards required to test a given volume of devices declines. Therefore, advances in the test process could cause us to lose sales.

        If semiconductor manufacturers implement chip designs that include increased built-in self-test capabilities or similar functions or methodologies that increase test throughput, it could negatively impact our sales or the migration of elements of final test to the wafer level. Additionally, if new chip designs or types of chips are implemented that require less, or even no, test using wafer probe cards, or significantly reduce wafer test complexity, our revenues could be impacted. Further, if new chip designs are implemented which we are unable to test, or which we are unable to test efficiently and provide our customers with an acceptably low overall cost of test, our revenues could be negatively impacted. Still further, if semiconductor manufacturers reduce generally the amount or degree of wafer test they perform, our revenues could be negatively impacted.

        We incur significant research and development expenses in conjunction with the introduction of new product architectures and platforms. Often, we time our product introductions to the introduction

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of new test equipment platforms or the declination of manufacturers to adopt a new test platform. Because our customers require both test equipment and wafer probe cards, any delay or disruption in the introduction of new test equipment platforms would negatively affect our growth.

We manufacture substantially all our products at our facility in Livermore, California, and any disruption in the operations of this facility could adversely impact our business and operating results.

        Our manufacturing processes require sophisticated and costly equipment and a specially designed facility, including a semiconductor clean room. While we are implementing steps to increase our manufacturing capabilities in certain of our foreign subsidiaries, we today still manufacture substantially all of our wafer probe cards at our facility located in Livermore, California. Any disruption in our manufacturing, whether due to contamination in our manufacturing process, technical or labor difficulties, destruction or damage from fire or earthquake, infrastructure failures such as power or water shortage or any other reason, could interrupt our operations, impair critical systems, disrupt communications with our customers and suppliers, and cause us to write off inventory, thereby potentially resulting in the loss of revenues. For example, during the fourth quarter of fiscal 2004, a contamination problem in our manufacturing line caused a yield decline that, in turn, resulted in our inability to timely ship products to our customers. In addition, if the previous energy crises in California that resulted in disruptions in power supply and increases in utility costs were to recur, we might experience power interruptions and shortages, which could disrupt our manufacturing operations. This could subject us to loss of revenues as well as significantly higher costs of energy. Further, current and potential customers might not purchase our products if they perceive our lack of a fully operational alternate manufacturing facility to be a risk to their continuing source of supply.

We are implementing our global regionalization strategy, and if we do not effectively devise and implement an effective global strategic plan or if we decide to change our strategy, our operating results could be negatively impacted.

        We are implementing our global regionalization strategy in which we are, in part, moving operational resources and capabilities to different country regions in Asia to be closer to our customers in order to enhance our customer relationships, improve our responsiveness and increase our product serviceability. The first phase of this strategy was focused on Singapore, where we have established design, sales, procurement and administrative functions. We also plan to develop a front-end manufacturing facility there. This portion of our manufacturing plan is currently on hold, and we cannot predict whether, when or in what form the plan may be restarted. We are devising and plan to execute a phased bring up of certain operational capabilities in different country regions in Asia in which we do business. For example, we have established assembly and test capabilities in South Korea. Our global regionalization strategy is subject to a variety of complexities and risks, many of which our executive team has had little experience in managing at FormFactor, and which may divert a substantial amount of our management's time. Risks stem from the following, among other things:

•

challenges in designing new facilities that can be scaled for future expansion, replicating current processes and bringing new facilities up to full operation;



•

unpredictable costs, redundancy costs and cost overruns for developing new facilities and acquiring equipment (e.g., design and construction costs increased at a pace that we could not have reasonably anticipated for the Singapore manufacturing plan);



•

building local management teams, technical personnel and other staff for functions that we have not previously conducted outside of Livermore California, United States;



•

technical obstacles such as poor production or process yield and loss of quality control during the ramp of a new facility;

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•

requalifications and other procedures that may be required by our customers;



•

our ability to bring up local suppliers to meet our quality and cycle-time needs;



•

rapidly changing business conditions that may require plans to be changed or abandoned before they are fully implemented; and



•

challenges posed by distance and by differences in language and culture.

        These and other factors could delay us in developing and implementing our strategy as well as impair our gross margins, delay shipments and deliveries, cause us to lose sales, require us to write off investments already made, damage our reputation and harm our business, financial condition and operating results. If we decide to change our current global regionalization strategy, we may incur charges for certain costs incurred. For example, we incurred a $4.4 million impairment charge related to a write-down of in-progress construction assets in Singapore for a manufacturing facility.

If we are unable to continue to reduce the time it takes for us to design and produce a wafer probe card, our growth could be impeded.

        Our customers continuously seek to reduce the time it takes them to introduce new products to market. The cyclicality of the semiconductor industry, coupled with changing demands for semiconductor devices, requires our customers to be flexible and highly adaptable to changes in the volume and mix of products they must produce. Each of those changes requires a new design and each new design requires a new wafer probe card. For some existing semiconductor devices, the manufacturers' volume and mix of product requirements are such that we are unable to design, manufacture and ship products to meet such manufacturers' relatively short cycle time requirements. We, for example, have lost sales in the past where we were unable to meet a customer's schedule for wafer probe cards for a particular design. If we are unable to reduce the time it takes for us to design, manufacture and ship our products in response to the needs of our customers, our competitive position could be harmed and we could lose sales. If we are unable to grow design capacity in the event demand increases, our ability to respond to customer requirements could be challenged and our revenues could be negatively impacted.

We obtain some of the components and materials we use in our products from a sole source or a limited group of suppliers, and the partial or complete loss of one of these suppliers could cause production delays and a substantial loss of revenues.

        We obtain some of the components and materials used in our products, such as printed circuit board assemblies, plating materials and ceramic substrates, from a sole source or a limited group of suppliers. Alternative sources are not currently available for sole source components and materials. Because we rely on purchase orders rather than long-term contracts with the majority of our suppliers, we cannot predict with certainty our ability to obtain components and materials in the longer term. A sole or limited source supplier could increase prices, which could lead to a decline in our gross margin. Our dependence upon sole or limited source suppliers exposes us to several other risks, including inability to obtain an adequate supply of materials, late deliveries and poor component quality. In addition, the ability of any of these suppliers to timely provide us with sufficient quality materials would be adversely affected if they are forced to reduce or discontinue operations due to financial difficulties, which is a heightened risk during the current economic downturn. Disruption or termination of the supply of components or materials could delay shipments of our products, damage our customer relationships and reduce our revenues. For example, if we were unable to obtain an adequate supply of a component or material, we might have to use a substitute component or material, which could require us to make changes in our manufacturing process. From time to time, we have experienced difficulties in receiving shipments from one or more of our suppliers, especially during periods of high demand for our products. If we cannot obtain an adequate supply of the components and materials we

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require, or do not receive them in a timely manner, we might be required to identify new suppliers. We might not be able to identify new suppliers on a timely basis or at all. We, as well as our customers would also need to qualify any new suppliers. The lead-time required to identify and qualify new suppliers could affect our ability to timely ship our products and cause our operating results to suffer. Further, a sole or limited source supplier could require us to enter into non-cancelable purchase commitments or pay in advance to ensure our source of supply. In an industry downturn or in an environment in which growth is not at a level we projected or anticipated, commitments of this type could result in charges for excess inventory of parts. If we are unable to predict our component and materials needs accurately, or if our supply is disrupted, we might miss market opportunities by not being able to meet the demand for our products.

Wafer probe cards that do not meet specifications or that contain defects could damage our reputation, decrease market acceptance of our technology, cause us to lose customers and revenues, and result in liability to us.

        The complexity and ongoing development of our wafer probe card manufacturing process, combined with increases in wafer probe card production volumes, have in the past and could in the future lead to design or manufacturing problems. For example, we have experienced the presence of contaminants in our plating baths, which have caused a decrease in our manufacturing yields or have resulted in unanticipated stress-related failures when our wafer probe cards are being used in the manufacturing test environment. A further example is that during the fourth quarter of fiscal 2004, we experienced a contamination problem in our manufacturing line. This contamination problem caused a yield decline that, in turn, resulted in our inability to timely ship products to our customers. Manufacturing design errors such as the miswiring of a wafer probe card or the incorrect placement of probe contact elements have caused us to repeat manufacturing design steps. In addition to these examples, problems might result from a number of factors, including design defects, materials failures, failures of components manufactured by our suppliers to meet our specifications, contamination in the manufacturing environment, impurities in the materials used, unknown sensitivities to process conditions, such as temperature and humidity, and equipment failures. As a result, our products have in the past contained and might in the future contain undetected errors or defects. Any errors or defects could:

•

cause lower than anticipated yields and lengthen delivery schedules;



•

cause delays in product shipments;



•

cause delays in new product introductions;



•

cause us to incur warranty expenses;



•

result in increased costs and diversion of development resources;



•

cause us to incur increased charges due to unusable inventory;



•

require design modifications; or



•

decrease market acceptance or customer satisfaction with these products.

        The occurrence of any one or more of these events could hurt our operating results.

        In addition, if any of our products fails to meet specifications or has reliability, quality or compatibility problems, our reputation could be damaged significantly and customers might be reluctant to buy our products, which could result in a decline in revenues, an increase in product returns or warranty costs and the loss of existing customers or the failure to attract new customers. Our customers use our products with test equipment and software in their manufacturing facilities. Our products must be compatible with the customers' equipment and software to form an integrated system. While we

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have designed our test capabilities and standards to replicate the actual test environment of our customers and continually work to improve our capabilities, it is possible that our wafer probe card will perform differently in the customers' actual test environments. If our wafer probe card does not function properly within a customer's specific test environment, we could be required to provide field application engineers to locate the problem, which can take time and resources. If the problem relates to our wafer probe cards, we might have to invest significant capital, manufacturing capacity and other resources to correct it. Our current or potential customers also might seek to recover from us any losses resulting from defects or failures in our products. Liability claims could require us to spend significant time and money in litigation or to pay significant damages.

If our ability to forecast demand for our products deteriorates or the predictability of our manufacturing yields does not improve, we could incur higher inventory losses than we currently experience.

        Each semiconductor chip design requires a custom wafer probe card. Because our products are design-specific, demand for our products is difficult to forecast. Due to our customers' short delivery time requirements, we often design, procure materials and, at times, produce our products in anticipation of demand for our products rather than in response to an order. Our manufacturing yields, particularly for new products, have historically been unpredictable and consequently, we generally produce more components for probe cards, or actual probe cards, than forecasted demand. If we do not obtain orders as we anticipate or if we continue to produce excess inventory to compensate for unpredictable manufacturing yields, we could have excess or obsolete inventory for a specific customer design that we would not be able to sell to any other customer, which would likely result in inventory write-offs or material charges for scrap.

If we fail to maintain an effective system of internal and disclosure controls, we may not be able to accurately report our financial results or prevent fraud, which may adversely affect our business and reputation. In addition, current and potential stockholders could lose confidence in our financial reporting, which may adversely impact the trading price of our securities.

        Effective internal and disclosure controls are necessary for us to provide reliable financial reports and effectively prevent fraud and to operate successfully as a public company. If we cannot provide reliable financial reports or prevent fraud, our business and reputation may be harmed. We regularly review and assess our internal control over financial reporting and our disclosure controls and procedures. As part of that process, we may discover material weaknesses or significant deficiencies in our internal control as defined under standards adopted by the Public Company Accounting Oversight Board, or PCAOB, that require remediation. A material weakness is a deficiency, or combination of deficiencies, in internal control over financial reporting, such that there is a reasonable possibility that a material misstatement of the company's annual or interim financial statements will not be prevented or detected in a timely basis. A significant deficiency is a deficiency or combination of deficiencies, in internal control over financial reporting that is less severe than material weakness, yet important enough to merit attention by those responsible for the oversight of the company's financial reporting. For example, in November 2007, we completed a review of our historical practices with respect to inventory valuation. That review indicated that during fiscal 2006 and the first half of fiscal 2007 we did not consistently follow our accounting policies for determining inventory valuation. Specifically, we did not maintain effective controls to ensure that the estimation process to value inventory complied with our accounting policies. As a result, we were required to restate our annual and interim financial statements for fiscal 2006 and interim financial statements for the first and second quarters of fiscal 2007 and to make audit adjustments to our annual financial statements for fiscal 2007. As a result of weaknesses that may be identified in our internal controls, we may also identify certain deficiencies in some of our disclosure controls and procedures that we believe require remediation. If we discover weaknesses, we will make efforts to improve our internal and disclosure controls. However, there is no assurance that we will be successful. If we fail to maintain effective controls or timely effect any

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necessary improvement of our internal and disclosure controls we may not have accurate information to make management decisions, our operating results could be harmed or we may cause us to fail to meet our reporting obligations, which could affect our ability to remain listed with The NASDAQ Global Market. Ineffective internal and disclosure controls could also cause stockholders to lose confidence in our reported financial information and our ability to manage our business, which would likely have a negative effect on the trading price of our securities.

We might be subject to claims of infringement of other parties' proprietary rights which could harm our business.

        In the future, as we have in the past, we might receive claims that we are infringing intellectual property rights of others or inquiries about our interest in a license, or assertions that we need a license, to the intellectual property. The semiconductor industry is characterized by uncertain and conflicting intellectual property claims and vigorous protection and pursuit of these rights. The resolution of any claims of this nature, with or without merit, could be time consuming, result in costly litigation or cause product shipment delays. In the event of an adverse ruling or settlement, we might be required to pay substantial damages, cease the use or sale of infringing products, spend significant resources to develop non-infringing technology, discontinue the use of certain technology and/or enter into license agreements. License agreements, if required, might not be available on terms acceptable to us or at all. The loss of access to any of our intellectual property or the ability to use any of our technology could harm our business. Finally, certain of our customer contracts contain provisions that require us to defend and/or indemnify our customers for third party intellectual property infringement claims, which would increase the cost to us of an adverse ruling or settlement.

If we fail to protect our proprietary rights, our competitors might gain access to our technology, which could adversely affect our ability to compete successfully in our markets and harm our operating results.

        If we fail to protect our proprietary rights adequately, our competitors might gain access to our technology. Unauthorized parties might attempt to copy aspects of our products or to obtain and use information that we regard as proprietary. Others might independently develop similar or competing technologies or methods or design around our patents. In addition, the laws of many foreign countries in which we or our customers do business do not protect our intellectual property rights to the same extent as the laws of the United States. To date, we have not been successful in our efforts to enforce our proprietary rights in South Korea. As a result, our proprietary rights could be compromised, our competitors might offer products similar to ours and we might not be able to compete successfully. We also cannot assure that:

•

our means of protecting our proprietary rights will be adequate;



•

patents will be issued from our pending or future applications;



•

our existing or future patents will be sufficient in scope or strength to provide any meaningful protection or commercial advantage to us;



•

our patents or other intellectual property will not be invalidated, circumvented or successfully challenged in the United States or foreign countries; or



•

others will not misappropriate our proprietary technologies or independently develop similar technologies, duplicate our products or design around any of our patents or other intellectual property, or attempt to manufacture and sell infringing products in countries that do not strongly enforce intellectual property rights.

        We have spent in the past and may be required to spend in the future significant resources to monitor and protect our intellectual property rights. We presently believe that it is likely that one or more of our competitors are using methodologies or have implemented structures into certain of their

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products that are covered by one or more of our intellectual property rights. We have in the past brought claims to protect our rights, and we are currently involved in patent infringement litigation and, in certain cases, our competitors have initiated re-examination proceedings in the U.S. Patent and Trademark Office and invalidity proceedings in foreign patent offices against certain of our patents. Any litigation, whether or not it is resolved in our favor, and whether it is initiated by us or by a third party, could result in significant and possibly material expense to us and divert the efforts of our management and technical personnel. In addition, while patents are territorial and a ruling on a certain given patent does not necessarily impact the validity or enforceability of a corresponding or related patent in a different country, an adverse ruling in one country might negatively impact our ability to enforce the corresponding or related patent in other countries. Finally, certain of our customer contracts contain provisions that require us to defend and/or indemnify our customers for third party intellectual property infringement claims, which would increase the cost to us of an adverse ruling in such a claim. An adverse determination could also negatively impact our ability to license certain of our technologies and methods to others, and result in our competitors being allowed to sell products with, or add to their products, features and benefits contained in our products, thereby reducing our competitive advantages over these competing products.

We may not be able to recruit or retain qualified personnel, which could harm our business.

        We believe our ability to successfully manage and grow our business and to develop new products depends, in large part, on our ability to recruit and retain qualified employees, particularly highly skilled technical, sales, management, and key staff personnel. Competition for qualified resources is intense and other companies may have greater resources available to provide substantial inducements to lure key personnel away from us or to offer more competitive compensation packages to individuals we are trying to hire. Additionally, we have implemented global cost reduction plans in which we have reduced our workforce and our current stock price is significantly below the exercise prices associated with stock options granted to employees over the past several years, which makes it challenging to retain key people and recruit new talent, as needed. While we are implementing, and plan to implement programs that will include goals for attracting employees and programs, which include goals of employee retention, and we may grant additional equity compensation to certain employees outside of our yearly equity grant program for retention purposes, there can be no assurance that we will be able to successfully recruit and retain the qualified personnel we require.

We may make acquisitions and investments, which could put a strain on our resources, cause ownership dilution to our stockholders and adversely affect our financial results.

        While we have made no acquisitions of businesses, products or technologies in the past, we may make acquisitions of complementary businesses, products or technologies in the future. We may also make certain investments in complementary or supplementary businesses, products or technologies in the future. Integrating newly acquired businesses, products or technologies into our company could put a strain on our resources, could be expensive and time consuming, and might not be successful. Future acquisitions and investments could divert our management's attention from other business concerns and expose our business to unforeseen liabilities or risks associated with entering new markets. In addition, we might lose key employees while integrating new organizations. Consequently, we might not be successful in integrating any acquired businesses, products or technologies, and might not achieve anticipated revenues and cost benefits. Investments that we make may not result in a return consistent with our projections upon which such investments are made, or may require additional investment that we did not originally anticipate. In addition, future acquisitions could result in customer dissatisfaction, performance problems with an acquired company, potentially dilutive issuances of equity securities or the incurrence of debt, contingent liabilities, possible impairment charges related to goodwill or other intangible assets or other unanticipated events or circumstances, any of which could harm our business.

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As part of our sales process, we could incur substantial sales and engineering expenses that do not result in revenues, which would harm our operating results.

        Our customers generally expend significant efforts evaluating and qualifying our products prior to placing an order. The time that our customers require to evaluate and qualify our wafer probe cards is typically between three and 12 months and sometimes longer. While our customers are evaluating our products, we might incur substantial sales, marketing, and research and development expenses. For example, we typically expend significant resources educating our prospective customers regarding the uses and benefits of our wafer probe cards and developing wafer probe cards customized to the potential customer's needs, for which we might not be reimbursed. Although we commit substantial resources to our sales efforts, we might never receive any revenues from a customer. For example, many semiconductor designs never reach production, including designs for which we have expended design effort and expense. In addition, prospective customers might decide not to use our wafer probe cards. The length of time that it takes for the evaluation process and for us to make a sale depends upon many factors including:

•

the efforts of our sales force and our distributor and independent sales representatives;



•

the complexity of the customer's fabrication processes;



•

the internal technical capabilities of the customer; and



•

the customer's budgetary constraints and, in particular, the customer's ability to devote resources to the evaluation process.

        In addition, product purchases are frequently subject to delays, particularly with respect to large customers for which our products may represent a small percentage of their overall purchases. As a result, our sales cycles are unpredictable. If we incur substantial sales and engineering expenses without generating revenues, our operating results could be harmed.

Our failure to comply with environmental laws and regulations could subject us to significant fines and liabilities, and new laws and regulations or changes in regulatory interpretation or enforcement could make compliance more difficult and costly.

        We are subject to various U.S. federal, state and local, and foreign governmental laws and regulations relating to the protection of the environment, including those governing the discharge of pollutants into the air and water, the management and disposal of hazardous substances and wastes, the cleanup of contaminated sites and the maintenance of a safe workplace. We could incur substantial costs, including cleanup costs, civil or criminal fines or sanctions and third-party claims for property damage or personal injury, as a result of violations of or liabilities under environmental laws and regulations or non-compliance with the environmental permits required at our facilities.

        These laws, regulations and permits also could require the installation of costly pollution control equipment or operational changes to limit pollution emissions or decrease the likelihood of accidental releases of hazardous substances. In addition, changing laws and regulations, new laws and regulations, stricter enforcement of existing laws and regulations, the discovery of previously unknown contamination at our or others' sites or the imposition of new cleanup requirements could require us to curtail our operations, restrict our future expansion, subject us to liability and cause us to incur future costs that could harm our operations, thereby adversely impacting our operating results and cash flow.

Because we conduct most of our business internationally, we are subject to operational, economic, financial and political risks abroad.

        Sales of our products to customers outside the United States have accounted for a significant part of our revenues. Our international sales as a percentage of our revenues were 78.2% and 82.2% for

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fiscal 2008 and fiscal 2007, respectively. Additionally, certain of our South Korean customers purchase through their North American subsidiaries. In the future, we expect international sales, particularly in Europe, Japan, South Korea and Taiwan, to continue to account for a significant percentage of our revenues. Accordingly, we will be subject to risks and challenges that we would not otherwise face if we conducted our business solely in the United States. These risks and challenges include:

•

compliance with a wide variety of foreign laws and regulations;



•

legal uncertainties regarding taxes, tariffs, quotas, export controls, export licenses and other trade barriers;



•

political and economic instability in, or foreign conflicts that involve or affect, the countries of our customers;



•

difficulties in collecting accounts receivable and longer accounts receivable payment cycles;



•

difficulties in staffing and managing personnel, distributors and representatives;



•

reduced protection for intellectual property rights in some countries;



•

currency exchange rate fluctuations, which could affect the value of our assets denominated in local currency, as well as the price of our products relative to locally produced products;



•

seasonal fluctuations in purchasing patterns in other countries; and



•

fluctuations in freight rates and transportation disruptions.

        Any of these factors could harm our existing international operations and business or impair our ability to continue expanding into international markets.

Changes in our tax rates, inability to realize our deferred tax assets or exposure to additional tax liabilities could adversely affect our operating results.

        We are subject to income taxes in both the United States and various foreign jurisdictions, and our domestic and international tax liabilities are subject to the allocation of expenses in different jurisdictions. Our effective tax rate could be adversely affected by changes in the mix of earnings in countries with different statutory tax rates, the inability to realize our deferred tax assets, as a result of recurring losses, changes in tax laws such as reducing the export sales and research and development tax credits, changes in our operational activities in connection with implementation of our global regionalization strategy, and material audit assessments. For example, realization of our deferred tax assets, which are predominantly in the United States, is dependent on our ability to generate sufficient future taxable income in the United States. If we determine that we may not be able to realize some portion of our deferred tax assets in the future, we would record a valuation allowance against the deferred tax assets that could result in additional income tax expense. In addition, the amount of income taxes we pay could be subject to ongoing audits in various jurisdictions and a material assessment by a governing tax authority could adversely affect our operating results.

We may not obtain the tax and other benefits that we anticipate through the expansion of our operations into Singapore, which could negatively impact our operating results.

        We have initiated the first phase of our company's global regionalization strategy in Singapore. Our plan, portions of which we have delayed, to build a front-end wafer manufacturing facility in Singapore, is driven in substantial part by the tax and other benefits that we believe are obtainable by operating in that country. These benefits include favorable tax exempt status granted by the Singapore government, subject to meeting certain conditions, as well as lower labor costs for qualified technical personnel. However, if we do not fulfill the conditions for our granted tax status for any reason, we may not obtain the full tax benefits, the tax benefits could lapse, any future tax benefits that we may

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seek may not be granted, and any benefits from royalty payments, or cost sharing payments, which have increased our effective tax rate. Additionally, our tax rate could be adversely impacted by any change in our planned operations in Singapore, if we do make such a change. Consequently, our effective corporate income tax rate may not decrease as we expect but instead, may remain approximately the same or increase. In addition, the other benefits of operating in Singapore may not materialize. The inability to obtain the anticipated tax and other benefits through the expansion of certain operations into Singapore could negatively impact our operating results.

The trading price of our common stock has been and is likely to continue to be volatile, and you might not be able to sell your shares at or above the price that you paid for them.

        The trading prices of the securities of technology companies have been highly volatile, and from January 1, 2008 through February 21, 2009, our stock price has ranged from $33.16 a share to $14.48 a share. The trading price of our common stock is likely to continue to be subject to wide fluctuations. Factors affecting the trading price of our common stock include:

•

variations in our operating results;



•

our forecasts and financial guidance for future periods;



•

announcements of technological innovations, new products or product enhancements, new product adoptions at semiconductor customers or significant agreements by us or by our competitors;



•

reports regarding our ability to bring new products into volume production efficiently;



•

the gain or loss of significant orders or customers;



•

changes in the estimates of our operating results or changes in recommendations by any securities analysts that elect to follow our common stock;



•

rulings on various of our pending litigations and proceedings relating to intellectual property matters;



•

seasonality, principally due to our customers' purchasing cycles;



•

market and competitive conditions in our industry, semiconductor industry and the economy as a whole; and



•

recruitment or departure of key personnel.

        In addition, if the market for technology stocks or the stock market in general experiences loss of investor confidence, the trading price of our common stock could decline for reasons unrelated to our business, operating results or financial condition. The trading price of our common stock also might decline in reaction to events that affect other companies in our industry even if these events do not directly affect us.

Provisions of our certificate of incorporation and bylaws or Delaware law might discourage, delay or prevent a change of control of our company or changes in our management and, therefore, depress the trading price of our common stock.

        Delaware corporate law and our certificate of incorporation and bylaws contain provisions that could discourage, delay or prevent a change in control of our company or changes in our management that the stockholders of our company may deem advantageous. These provisions:

•

establish a classified board of directors so that not all members of our board are elected at one time;

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•

provide that directors may only be removed "for cause" and only with the approval of 662/3% of our stockholders;



•

require super-majority voting to amend some provisions in our certificate of incorporation and bylaws;



•

authorize the issuance of "blank check" preferred stock that our board could issue to increase the number of outstanding shares and to discourage a takeover attempt;



•

limit the ability of our stockholders to call special meetings of stockholders;



•

prohibit stockholder action by written consent, which requires all stockholder actions to be taken at a meeting of our stockholders;



•

provide that the board of directors is expressly authorized to make, alter or repeal our bylaws; and



•

establish advance notice requirements for nominations for election to our board or for proposing matters that can be acted upon by stockholders at stockholder meetings.

        In addition, Section 203 of the Delaware General Corporation Law may discourage, delay or prevent a change in control of our company. In addition, each of our named executive officers and certain other officers of the company have entered into change of control severance agreements, which were approved by our Compensation Committee, which could increase the costs associated with a change of control and thus, potentially deter such a transaction.

Item 1B:    Unresolved Staff Comments

        None.

Item 2:    Properties

        Our corporate headquarters, which includes sales, marketing, administration, manufacturing, engineering, and research and development facilities, is located in Livermore, California, United States. Our corporate headquarters is comprised of a campus of six buildings totaling approximately 210,000 square feet. We presently lease those six buildings. We also own one building which was a part of our older manufacturing facility and which we are no longer using. That building is presently for sale. In addition, we also lease office, repair and service, and/or research and development space outside of the United States. The leases expire at various times through 2021. We believe that our existing and planned facilities are suitable for our current needs.

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        Information concerning our properties as of December 27, 2008 is set forth below:

Item 3:    Legal Proceedings

        From time to time, we may be subject to legal proceedings and claims in the ordinary course of business. As of the filing of this Form 10-K, we were not involved in any material legal proceedings, other than the proceedings summarized below. In the future we may become parties to additional legal proceedings, including proceedings designed to protect our intellectual property rights and to collect past due accounts receivable from customers that require us to spend significant resources.

Patent Litigation

        We initiated patent infringement litigation in the United States against Phicom Corporation, a Korea corporation, and its U.S. subsidiary, both collectively "Phicom", and against Micronics Japan Co., Ltd., a Japan corporation, and its U.S. subsidiary, both collectively "Micronics Japan." In 2005, we filed a patent infringement lawsuit in the United States District Court for the District of Oregon against Phicom charging that it is willfully infringing four U.S. patents that cover key aspects of our wafer probe cards—U.S. Patent Nos. 5,974,662, entitled "Method of Planarizing Tips of Probe Elements of a Probe Card Assembly," 6,246,247, entitled "Probe Card Assembly and Kit, and Methods of Using Same," 6,624,648, entitled "Probe Card Assembly" and 5,994,152, entitled "Fabricating Interconnects and Tips Using Sacrificial Substrates." In 2006, we also filed an amended complaint in the same Oregon district court adding two additional patents to the litigation—U.S. Patent Nos. 7,073,254, entitled "Method for Mounting a Plurality of Spring Contact Elements" and 6,615,485, entitled "Probe Card Assembly and Kit, And Methods of Making Same." Phicom answered the complaint and the amended complaint by denying infringement, alleging defenses and asserting counterclaims seeking adjudications on the validity, infringement and enforceability of our patents. Also

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in 2006, we filed a patent infringement lawsuit in the United States District Court for the Northern District of California against Micronics Japan charging that it is willfully infringing four U.S. patents that cover key aspects of our wafer probe cards—U.S. Patent Nos. 6,246,247, entitled "Probe Card Assembly and Kit, and Methods of Using Same," 6,509,751, entitled "Planarizer for a Semiconductor Contactor," 6,624,648, entitled "Probe Card Assembly" and 7,073,254, entitled "Method for Mounting a Plurality of Spring Contact Elements." Micronics Japan answered the complaint by denying infringement, alleging defenses and asserting counterclaims seeking adjudications on the validity, infringement and enforceability of our patents. The complaints in these actions seek both injunctive relief and monetary damages. These two district court actions have been stayed pending resolution of the complaint we filed with the United States International Trade Commission, or ITC, which is described below.

        On or about November 13, 2007, we filed a complaint with the ITC seeking institution of a formal investigation by the ITC into the activities of Micronics Japan and its U.S. subsidiary (collectively MJC) as well as Phicom. The requested investigation as filed encompassed U.S. Patent Nos. 5,994,152, entitled "Fabricating Interconnects and Tips Using Sacrificial Substrates," 6,509,751, entitled "Planarizer for a Semiconductor Contactor," 6,615,485, entitled "Probe Card Assembly and Kit, And Methods of Making Same," 6,624,648, entitled "Probe Card Assembly," 7,168,162, entitled "Method of Manufacturing a Probe Card" and 7,225,538, entitled "Resilient Contact Structures Formed and Then Attached to a Substrate," and alleges that infringement by each of Micronics Japan and Phicom of certain of the identified patents constitute unfair acts in violation of 19 U.S.C. Section 1337. The ITC complaint alleges violations of Section 337 of the Tariff Act of 1930 in the importation into the United States of certain probe card assemblies, components thereof, and certain tested DRAM and NAND flash memory devices and products containing such devices that infringe patents owned by FormFactor, and request a permanent exclusion order banning importation into the United States of infringing products and certain downstream products. The asserted patents currently in the investigation are U.S. Patent Nos. 5,994,152, 6,509,751, 6,615,485, and 7,225,538.

        On or about December 13, 2007, the ITC provided public notice that it voted to institute an investigation of certain probe card assemblies, components thereof and certain tested DRAM and NAND flash memory devices and products containing such devices. The products at issue in this investigation are probe card assemblies, which are used to test semiconductor devices that have been fabricated on silicon wafers, memory chips that have been so tested, and products containing such chips.

        The investigation (337-TA-621) was originally referred to the Honorable Theodore R. Essex, an ITC administrative law judge, and in July 2008 was reassigned to the Honorable Charles E. Bullock, an ITC administrative law judge, who will make an initial determination as to whether there is a violation of Section 337; that initial determination is subject to review by the ITC. The ITC has announced a scheduled hearing date commencing on February 23, 2009; which would likely result in the issuance of an initial determination by the administrative law judge on or before June 19, 2009. The target date for the ITC's final determination is October 19, 2009. ITC remedial orders in Section 337 cases are effective when issued and become final 60 days after issuance, subject to Presidential review. On or about January 23, 2009, the administrative law judge, after a September 2008 hearing, issued a claim construction ruling interpreting and defining terms of certain of the claims of the patents-in-suit. On or about January 28, 2009, we voluntarily withdrew our allegations to the extent that they encompassed our U.S. Patent No. 7,168,162, and on or about February 13, 2009 the administrative law judge issued an initial determination holding invalid the asserted claims of our U.S. Patent No. 6,624,648, after finding as part of the claim construction ruling that one of the terms in the asserted claims of that patent is indefinite. We appealed that initial determination of invalidity to the ITC panel on or about February 18, 2009.

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        In addition to the United States litigations, we also initiated actions in Seoul, Korea against Phicom. In 2004, we filed two actions in Seoul Southern District Court, located in Seoul, South Korea, against Phicom alleging infringement of our Korean Patent Nos. 252,457, entitled "Method of Fabricating Interconnections Using Cantilever Elements and Sacrificial Substrates," 324,064, entitled "Contact Tip Structures for Microelectronic Interconnection Elements and Methods of Making Same," 278,342, entitled "Method of Altering the Orientation of Probe Elements in a Probe Card Assembly" and 399,210, entitled "Probe Card Assembly" as well as two actions we filed in 2006 in Seoul Central District Court against Phicom alleging infringement of certain claims of its Korean Patent No. 252,457 and seeking injunctive relief. These actions are all pending, except that (i) in February 2007, the Seoul Central District Court dismissed our preliminary injunction complaint related to Korean Patent No. 252,457 (ii) in April 2008, the Seoul Southern District Court dismissed our complaint as it related to Korean Patent Nos. 252,457 and 324,064, and (iii) in July 2008, the Seoul Central District Court dismissed the our merit complaint related to Korean Patent No. 252,457. We appealed the dismissals to the Seoul High Court except the dismissal of the preliminary injunction claim.

        In response to our initiation of the infringement actions in Korea, Phicom filed in the Korean Intellectual Property Office, or KIPO, invalidity actions challenging the validity of some or all of the claims of each of our four patents at issue in the Seoul Southern District Court infringement actions. KIPO dismissed Phicom's challenges against all four of the patents-at-issue. Phicom appealed the dismissals of the challenges to the Korea Patent Court. In 2005 the Korea Patent Court issued rulings holding invalid certain claims of our Korean Patent Nos. 278,342 and 399,210. In 2006, the Korea Patent Court issued a ruling holding invalid certain claims of our Korean Patent No. 324,064, and also issued a ruling upholding the validity of our Korean Patent No. 252,457. We appealed the Patent Court invalidity rulings to the Korea Supreme Court. Phicom appealed the Patent Court ruling on Korean Patent No. 252,457 to the Korea Supreme Court. In September 2007, the Korea Supreme Court affirmed the Patent Court rulings holding invalid certain claims of our Korean Patent Nos. 278,342 and 399,210. In April 2008, the Korea Supreme Court affirmed the Patent Court ruling holding invalid certain claims of our Korean Patent No. 324,064. In June 2008, the Korea Supreme Court reversed the Patent Court ruling and invalidated certain claims of our Korean Patent No. 252,457 and remanded the case for further trial to the Patent Court.

        Additionally, one or more third parties have initiated challenges in the U.S. and foreign patent offices against certain of the above and other of our patents. These actions include re-examination proceedings filed in the U.S. Patent and Trademark Office against certain of our U.S. Patents that are at issue in the ITC investigation, and proceedings in Korea against two of our Korean patents and proceedings filed in Taiwan against four of our Taiwan patents.

        No provision has been made for patent-related litigation because we believe that it is not probable that a liability had been incurred as of December 27, 2008. We will incur material attorneys' fees in prosecuting and defending the various identified actions.

Securities Litigation

        On October 31, 2007, a plaintiff filed a purported stockholder class action in the United States District Court for the Northern District of California in which our company and certain of its then officers, including one former officer who is a current director, are named as defendants under the caption "Danny McCasland, Individually and on Behalf of All Others Similarly Situated v. FormFactor, Inc., Igor Y. Khandros, Ronald C. Foster and Richard M. Freeman." Subsequently, plaintiffs filed two other purported stockholder class actions in the United States District Court for the Northern District of California under the captions "Yuk Ling Lui, on Behalf of Herself and All Others Similarly Situated v. FormFactor, Inc., Igor Y. Khandros, Ronald C. Foster and Richard M. Freeman," and "Victor Albertazzi, Individually and on Behalf of All Others Similarly Situated v. FormFactor, Inc., Igor Y. Khandros, Ronald C. Foster and Richard M. Freeman." The three actions have been

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consolidated. The plaintiffs filed these actions following our company's restatement of its financial statements for the fiscal year ended December 30, 2006, for each of the fiscal quarters for that year, and for the fiscal quarters ended March 31 and June 30, 2007. In April 2008, the designated lead plaintiffs filed a Consolidated Amended Complaint. The plaintiffs claimed violations of Sections 10(b) and 20(a), and Rule 10b-5 of the Securities Exchange Act of 1934, alleging that the defendants knowingly issued materially false and misleading statements regarding our company's business and financial results prior to the restatements. On July 25, 2008, the court granted the defendants' motion to dismiss the Consolidated Amended Complaint with leave to amend. On August 22, 2008 the designated lead plaintiffs filed a Second Amended Complaint. The Second Amended Complaint also alleges violations of Sections 10(b) and 20(a), and Rule 10b-5 of the Securities Exchange Act of 1934. The plaintiffs again claim that defendants knowingly issued materially false and misleading statements regarding our company's business and financial results prior to the restatement, as well as regarding the development of the Harmony product line. Plaintiffs seek to recover unspecified monetary damages, equitable relief and attorneys' fees and costs. Defendants filed a motion to dismiss the Second Amended Complaint on October 6, 2008, and a hearing on the motion was held on January 16, 2009. We expect that the Court will rule on the current motion to dismiss within the next several weeks.

        No provision has been made for the securities litigation because we believe that it is not probable that a liability had been incurred as of December 27, 2008.

Stockholder Derivative Litigation

        On November 19, 2007, a plaintiff filed a purported stockholder derivative action in the Superior Court of the State of California for the County of Alameda in which our company is named as a nominal defendant and certain of its directors and then officers are named as defendants under the caption "John King, Derivatively on Behalf of Nominal Defendant FormFactor, Inc. v. Dr. Igor Y. Khandros, Dr. Homa Bahrami, Dr. Thomas J. Campbell, G. Carl Everett, Jr., Lothar Maier, James A. Prestridge, Harvey A. Wagner, Ronald C. Foster and Richard M. Freeman, and FormFactor, Inc." Subsequently, another plaintiff filed a second purported stockholder class action in the Superior Court of the State of California for the County of Alameda under the caption "Joseph Priestley, Derivatively on Behalf of FormFactor, Inc. v. Igor Y. Khandros, Mario Ruscev, James A. Prestridge, Thomas J. Campbell, Harvey A. Wagner, G. Carl Everett, Jr., Homa Bahrami, Lothar Maier, William H. Davidow and Joseph R. Bronson, and FormFactor, Inc." The plaintiffs filed these two later actions following our company's restatement of its financial statements for the fiscal year ended December 30, 2006, for each of the fiscal quarters for that year, and for the fiscal quarters ended March 31 and June 30, 2007. The plaintiffs allege that the defendants breached their fiduciary duties and violated applicable law by issuing, and permitting our company to issue, materially false and misleading statements regarding our company's business and financial results prior to the restatements. The plaintiffs seek to recover monetary damages, and attorneys' fees and costs. The two derivative actions have been consolidated, and a consolidated amended complaint is to be filed 30 days after the Court in the stockholder class action enters a final ruling.

        No provision has been made for the stockholder derivative litigation because the Company believes that it is not probable that a liability had been incurred as of December 27, 2008.

Commercial Litigation

        On February 20, 2009, we filed a complaint for breach of contract, common counts, account stated and injunctive relief against Spansion, LLC, a Delaware limited liability company ("Spansion"), in the state superior court located in Santa Clara County, California. The complaint alleges that Spansion has failed, in breach of Spansion's obligations under a purchase agreement entered into by us and Spansion, to pay us for probe cards that we designed, developed and manufactured pursuant to several purchase orders placed by Spansion with us pursuant to the agreement. The complaint states that as of

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February 13, 2009, Spansion owed us $8,094,533 for probe cards delivered by us and not paid for by Spansion. In the complaint, we seek (i) payment of at least $8,094,533, (ii) a temporary protective order and an injunction enjoining Spansion from assigning or in any way divesting itself of any monies that we believe Spansion received from a certain third party entity, (iii) a prejudgment writ of attachment in favor of us over Spansion's corporate assets and property, (iv) costs and (v) attorney's fees. As of the date of this Form 10-K, Spansion had not yet responded to the complaint.

        We believe that the factual allegations and circumstances underlying the legal proceedings in this Item 3 filed against us are without merit. We also believe that we do not have material monetary damages exposure in these legal proceedings that would individually or in the aggregate have a material adverse effect on our financial condition, liquidity or results of operations; however, these legal proceedings have been costly and it is possible we will incur significant, and possibly material, attorneys' fees, which may not be covered by our insurance policies. These legal proceedings may also divert our management's time and attention away from business operations, which could prove to be disruptive to our business operations. In addition, an unfavorable outcome or settlement of these proceedings, particularly if it is not covered by or exceeds our insurance coverage, could individually or in the aggregate adversely impact our financial condition, liquidity or results of operations.

Item 4:    Submission of Matters to a Vote of Security Holders

        None.

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PART II

Item 5:    Market for Registrant's Common Equity, Related Stockholder Matters and Issuer Purchases of Equity Securities

Price Range of Common Stock

        Our common stock is listed on the Nasdaq Global Market under the symbol "FORM". The following table sets forth the range of high and low sales prices per share as reported on the Nasdaq Global Market for the periods indicated.

        The closing sales price of our common stock on the Nasdaq Global Market was $14.48 per share on February 20, 2009. As of February 20, 2009, there were 80 registered holders of record of our common stock.

Dividend Policy

        We have never declared or paid cash dividends on our common stock. We currently expect to retain all available funds and any future earnings for use in the operation and development of our business. Accordingly, we do not anticipate declaring or paying cash dividends on our common stock in the foreseeable future.

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Stock Price Performance Graph

        The following graph shows the total stockholder return of an investment of $100 in cash on December 31, 2003 through December 31, 2008, for (1) our common stock, (2) the S&P 500 Index and (3) the RDG Semiconductor Composite Index. All values assume reinvestment of the full amount of all dividends. No cash dividends have been declared on shares of our common stock. Stockholder returns over the indicated period are based on historical data and are not necessarily indicative of future stockholder returns.

        $100 invested on December 31, 2003, including reinvestment of dividends.

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Item 6:    Selected Financial Data

        The following selected consolidated financial data are derived from our consolidated financial statements. This data should be read in conjunction with our consolidated financial statements and the related notes, and "Item 7: Management's Discussion and Analysis of Financial Condition and Results of Operations".

(1)

Fiscal 2008 operating results include an impairment charge of $4.4 million related to Singapore construction-in-progress assets (See Note 3 of Notes to the Consolidated Financial Statements).

(2)

Fiscal 2008 operating results include restructuring charges of $9.2 million relating to our global reorganization efforts. (See Note 5 of Notes to the Consolidated Financial Statements).

(3)

Effective December 31, 2005, the first day of fiscal 2006, we adopted Statement of Financial Accounting Standards ("SFAS") No. 123(R), "Share-Based Payment" on a modified prospective basis. As a result, we have included stock-based compensation costs in our results of operations beginning in fiscal 2006. (See Note 9 of Notes to the Consolidated Financial Statements).

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Item 7:    Management's Discussion and Analysis of Financial Condition and Results of Operations

        The following discussion and analysis of our financial condition and results of operations should be read in conjunction with our consolidated financial statements and the related notes included elsewhere in this Annual Report on Form 10-K. In addition to historical consolidated financial information, the following discussion and analysis contains forward-looking statements that involve risks, uncertainties and assumptions as described under the "Note Regarding Forward-Looking Statements" that appears earlier in this Annual Report on Form 10-K. Our actual results could differ materially from those anticipated by these forward-looking statements as a result of many factors, including those discussed under "Item 1A: Risk Factors" and elsewhere in this Annual Report on Form 10-K.

Overview

        We design, develop, manufacture, sell and support precision, high performance advanced semiconductor wafer probe card products and solutions. Semiconductor manufacturers use our wafer probe cards to perform wafer sort and test on the semiconductor die, or chips, or the whole semiconductor wafer, which is prior to singulation of the wafer into individual separate chips. We work closely with our customers to design, develop and manufacture custom wafer probe cards. Each wafer probe card is a custom product that is specific to the chip and wafer designs of the customer. We operate in a single industry segment and have derived substantially all of our revenues from the sale of wafer probe cards incorporating our proprietary MicroSpring interconnect technology.

        The oversupply of memory devices in the early part of our fiscal 2008, coupled with the overall global economic downturn and uncertainty in fiscal 2008 had a significant impact on global semiconductor device manufacturing, which resulted in a significant decrease in demand and a challenging environment for our advanced wafer probe cards. Our revenues declined by 54.5%, or $252.0 million, in fiscal 2008 as compared to fiscal 2007. This revenue decline was in each of the product markets we address—Dynamic Random Access Memory, or DRAM, NAND and NOR Flash memory and System on a Chip, or SoC. These results were due to a number of factors including the relative supply and demand of various semiconductor devices and end products incorporating those devices, semiconductor manufacturers' efforts to curtail spending and conserve cash by taking capacity offline, reducing production, delaying the transition to new technology nodes and postponing the implementation of tooling cycles. We expect the deteriorated market conditions for our semiconductor customers to continue or worsen in fiscal 2009, which could cause our DRAM-based revenue to further decline in light of the protracted oversupply of DRAM devices, the delay of probe card purchases by some of our DRAM customers and the delay of technology transitions by some of our DRAM customers.

        We incurred a net loss of $80.6 million in fiscal 2008 as compared to net income of $72.9 million for fiscal 2007, primarily due to lower revenues, the inclusion of $9.2 million of restructuring charges, $4.4 million of impairment charges related to long-lived assets, and $4.1 million in provision for bad debt reserve due to the heightened risk of non-payment of certain accounts receivable. We implemented two cost reduction plans in fiscal 2008 which consisted primarily of global workforce reductions, facility consolidation, and property and equipment impairments.

        We expect continued decline in demand for our products that address the DRAM, Flash and SoC markets to persist which will affect our revenues and profitability into fiscal 2009. Given the overall weakness of the United States economy and the global macroeconomy, and the current downturn in the semiconductor industry and its effects on demand for our products, we are unable to precisely forecast when or if revenues and profitability will return to previous levels.

        Our cash, cash equivalents and marketable securities totaled approximately $522.9 million as of December 27, 2008 as compared to $570.0 million at December 29, 2007. The decrease in our cash, cash equivalents and marketable securities balances was primarily due to the use of cash for operating

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activities in fiscal 2008. We believe that we will be able to satisfy our working capital requirements for the next twelve months with the liquidity provided by our existing cash, cash equivalents and marketable securities. If we are unsuccessful in improving our operating efficiency, reducing our cash outlays or increasing our available cash through financing, our cash, cash equivalents and marketable securities will further decline in the first quarter of fiscal 2009.

        In response to the continued deterioration in semiconductor market conditions, we are focusing on aligning our operations and improving our operating efficiency to achieve operating cash flow break-even in the current business environment and to better position our company for long-term, profitable growth. In January 2009, we initiated a global reorganization and cost reduction plan designed to lower the company's cash breakeven level in order to enable us to sustain ourselves financially in the current market environment. As part of the plan, we reduced our workforce by 22%. We also implemented certain non-severance measures that we expect to result in future cost savings.

        In addition, we are restructuring our operations through our global regionalization strategy by, for example, placing more decision-making in regions close to our semiconductor customers to enhance customer relationships, strengthening our local design, application and service capabilities to improve customer responsiveness, changing our manufacturing structure for shorter cycle time and improved product delivery capabilities, and realigning our research and development efforts.

        We believe the following information is important to understanding our business, our financial statements and the remainder of this discussion and analysis of our financial condition and results of operations:

        Fiscal Year.    Fiscal years ended December 27, 2008, December 29, 2007 and December 30, 2006 had 52 weeks each. Our fiscal year ends on the last Saturday in December.

        Revenues.    We derive substantially all of our revenues from product sales of wafer probe cards. Revenues from our customers are subject to fluctuations due to factors including, but not limited to, design cycles, technology adoption rates, competitive pressure to reduce prices, cyclicality of the different end markets into which our customers' products are sold and market conditions in the semiconductor industry. Historically, increases in revenues have resulted from increased demand for our existing products, the introduction of new, more complex products and the penetration of new markets. We expect that revenues from the sale of wafer probe cards will continue to account for substantially all of our revenues for the foreseeable future.

        Cost of Revenues.    Cost of revenues consists primarily of manufacturing materials, payroll and manufacturing-related overhead. In addition, cost of revenues also includes costs related to the start up of our new manufacturing facility, which was completed in early 2006 and costs of the expansion of our manufacturing facility which was completed in 2007. Our manufacturing operations rely upon a limited number of suppliers to provide key components and materials for our products, some of which are a sole source. We order materials and supplies based on backlog and forecasted customer orders. Tooling and setup costs related to changing manufacturing lots at our suppliers are also included in the cost of revenues. We expense all warranty costs and inventory provisions or write-offs of inventory as cost of revenues.

        We design, manufacture and sell a fully custom product into the semiconductor test market, which is subject to significant variability and demand fluctuations. Our wafer probe cards are complex products that are custom to a specific chip design and must be delivered on relatively short lead-times as compared to our overall manufacturing process. As our advanced wafer probe cards are manufactured in low volumes and must be delivered on relatively short lead-times, it is not uncommon for us to acquire production materials and start certain production activities based on estimated production yields and forecasted demand prior to or in excess of actual demand for our wafer probe cards. We record an adjustment to our inventory valuation for estimated obsolete and non-saleable

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inventories equal to the difference between the cost of inventories and the estimated market value based upon assumptions about future demand and market conditions

        Research and Development.    Research and development expenses include expenses related to product development, engineering and material costs. Almost all research and development costs are expensed as incurred. We plan to continue to invest a significant amount in research and development activities to improve and enhance existing technologies and to develop new technologies for current and new markets and for new applications. In fiscal 2008, our relative percentage of revenue expenditure on research and development increased as compared to our expenditures in our fiscal 2007 and fiscal 2006, primarily due to the decrease in revenues for fiscal 2008. We expect our relative investment in research and development to retain at the higher relative percentage of revenues for the short term, including through our fiscal 2009, due to our continued commitment to product improvement, and new product and technology development.

        Selling, General and Administrative.    Selling, general and administrative expenses include expenses related to sales, marketing, and administrative personnel, provision for doubtful accounts, internal and outside sales representatives' commissions, market research and consulting, and other sales, marketing, and administrative activities. These expenses also include costs for enforcing our patent rights and regulatory compliance costs.

        Restructuring.    Restructuring charges include expenses related to employee termination severance pay and benefits and property, equipment and facility impairment charges incurred as part of our global cost reduction plans.

        Impairment of Long Lived Assets.    Asset impairment charges include charges associated with the write down of assets that have no future expected benefit or assets for which circumstances indicate that the carrying amount of these assets may not be recoverable.

Critical Accounting Policies and Estimates

        Our discussion and analysis of our financial condition and results of operations are based upon our consolidated financial statements, which have been prepared in accordance with U.S. generally accepted accounting principles. The preparation of these financial statements requires us to make estimates and assumptions that affect the reported amounts of assets and liabilities at the date of the financial statements and the reported amounts of net revenue and expenses in the reporting. Our accounting policies are fundamental to understanding our financial condition and results of operations reported in our financial statements and related disclosures. We have identified the following accounting policies as being critical because they require our management to make particularly difficult, subjective and/or complex judgments about the effect of matters that are inherently uncertain. We evaluate our estimates and assumptions on an ongoing basis and we base these estimates and assumptions on current facts, historical experiences and various other factors and assumptions that are believed to be reasonable under the circumstances. Actual results may differ materially and adversely from our estimates. Our management has discussed the development, selection, application and disclosure of these critical accounting policies with the Audit Committee of our Board of Directors.

        Revenue Recognition:    We recognize revenue in accordance with Staff Accounting Bulletin No. 104, "Revenue Recognition," and all related interpretations. Revenue is recognized when all of the following criteria have been met:

•

When persuasive evidence of an arrangement exists. Contracts and customer purchase orders are generally used to determine the existence of an arrangement.

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•

Delivery has occurred. Shipping documents and customer acceptance, when applicable, are used to verify delivery. Revenues from product sales to our customers other than our distributor are recognized upon shipment or delivery depending on the terms of sale.



•

The fee is fixed or determinable. We assess whether the fee is fixed or determinable based on the payment terms associated with the transaction and whether the sales price is subject to refund or adjustment.



•

Collectibility is reasonably assured. We assess collectibility based primarily on the creditworthiness of our customer as determined by credit checks and analysis, as well as our customer's payment history.

        In instances where final acceptance of our product, is specified by our customer, revenue is deferred until all acceptance criteria have been met.

        In multiple element arrangements, we determine whether there is more than one unit of accounting. To the extent that the deliverables are separable into multiple units of accounting, we then allocate the total fee on such arrangements to the individual units of accounting based on relative fair value of individual elements.

        We offer product maintenance and repair arrangements to our customers. Amounts due from our customers under these arrangements are initially recorded as deferred revenues. The fees are recognized as revenue on a straight-line basis over the service period and related costs are recorded as incurred.

        Revenues from the licensing of our design and manufacturing technology, which have been insignificant to date, are recognized over the term of the license agreement or when the significant contractual obligations have been fulfilled.

        Warranty Accrual:    We provide for the estimated cost of product warranties at the time revenue is recognized. While we engage in extensive product quality programs and processes, including actively monitoring and evaluating the quality of our component suppliers, our warranty obligation is affected by product failure rates, material usage and service delivery costs incurred in correcting a product failure. We continuously monitor product returns for warranty and maintain a reserve for the related expenses based upon our historical experience and any specifically identified field failures. As we sell new products to our customers, we must exercise considerable judgment in estimating the expected failure rates. This estimating process is based on historical experience of similar products, as well as various other assumptions that we believe to be reasonable under the circumstances. If we experience an increase in warranty claims compared with our historical experience, or if the cost of servicing warranty claims is greater than expected, our gross margin could be adversely affected.

        Inventory Valuation:    We state our inventories at the lower of cost (principally standard cost which approximates actual cost on a first in, first out basis) or market. We review the adequacy of our inventory reserves on a quarterly basis and record adjustments to our inventory valuation for estimated obsolescence or non-saleable inventories equal to the difference between the cost of inventories and the estimated market value based upon assumptions about future demand and market conditions. If actual market conditions are less favorable than those projected by management, additional inventory reserves may be required. Inventory write downs once established are not reversed until the related inventory has been scrapped or sold.

        Allowance for Doubtful Accounts:    A majority of our trade receivables are derived from sales to large multinational semiconductor manufacturers throughout the world. In order to monitor potential credit losses, we perform ongoing credit evaluations of our customers' financial condition. An allowance for doubtful accounts is maintained for probable credit losses based upon our assessment of the expected collectibility of all accounts receivable. The allowance for doubtful accounts is reviewed on a

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quarterly basis to assess the adequacy of the allowance. We take into consideration (1) any circumstances of which we are aware of a customer's inability to meet its financial obligations; and (2) our judgments as to prevailing economic conditions in the industry and their impact on our customers. If a major customer's creditworthiness deteriorates, or if actual defaults are higher than our historical experience, or if other circumstances arise, our estimates of the recoverability of amounts due to us could be overstated, and additional allowances could be required, which could have an adverse impact on our revenue.

        Impairment of Long-Lived Assets and Long-Lived Assets to be Disposed of:    We account for the impairment of long-lived assets in accordance with Statement of Financial Accounting Standard No. 144, "Accounting for the Impairment or Disposal of Long-Lived Assets" ("SFAS 144"). We evaluate the carrying value of our long-lived assets whenever certain events or changes in circumstances indicate that the carrying amount of these assets may not be recoverable. Such events or circumstances include, but are not limited to, a prolonged industry downturn, a significant decline in our market value or significant reductions in projected future cash flows.

        Significant judgments and assumptions are required in the forecast of future operating results used in the preparation of the estimated future cash flows, including profit margins, long-term forecasts of the amounts and timing of overall market growth and our percentage of that market, groupings of assets, discount rates and terminal growth rates. In addition, significant estimates and assumptions are required in the determination of the fair value of our tangible long-lived assets, including replacement cost, economic obsolescence, and the value that could be realized in orderly liquidation. Changes in these estimates could have a material adverse effect on the assessment of our long-lived assets, thereby requiring us to write down the assets.

        Accounting for Income Taxes:    We are subject to income taxes in the United States and numerous foreign jurisdictions. As part of the process of preparing our consolidated financial statements, we are required to estimate our income taxes. This process involves estimating our actual current tax exposure together with assessing temporary differences that may result in deferred tax assets. Management judgment is required in determining any valuation allowance recorded against our net deferred tax assets. Any such valuation allowance would be based on our estimates of income and the period over which our deferred tax assets would be recoverable. While management has considered taxable income and ongoing prudent and feasible tax planning strategies in assessing the need for a valuation allowance, if we were to determine that we would not be able to realize all or part of our net deferred tax assets in the future, an adjustment to the deferred tax assets would result in additional income tax expense in such period. We have evaluated the need for a valuation allowance against our deferred tax assets and based on the weight of the available evidence we have concluded that it is more likely than not we will be able to realize all of our U.S. deferred tax assets. We have also evaluated our foreign deferred tax assets related to certain net operating losses and have concluded that it is more likely than not that these assets will not be utilized and therefore, we have recorded a full valuation allowance for those deferred tax assets.

        Our provision for income taxes is subject to volatility and could be adversely impacted by earnings being lower than anticipated in countries that have lower tax rates and higher than anticipated in countries that have higher tax rates; by changes in the valuation of our deferred tax assets and liabilities; by expiration of or lapses in the R&D tax credit laws; by transfer pricing; by tax effects of nondeductible compensation; by tax costs related to intercompany realignments; or by changes in tax laws, regulations, or accounting principles, including accounting for uncertain tax positions or interpretations thereof. Additionally, our current and deferred tax provision is based on estimates and assumptions that could differ from the actual results reflected in income tax returns filed. Differences between our tax provision and tax return may occur and such adjustments are recorded when identified.

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        Effective at the beginning of the first quarter of fiscal 2007, we adopted Financial Accounting Standards Board ("FASB") Interpretation No. 48, "Accounting for Uncertainty in Income Taxes, an Interpretation of FASB Statement No. 109" ("FIN 48") which is a change in accounting for income taxes. FIN 48 contains a two-step recognizing and measuring uncertain tax positions accounted for in accordance with Statement of Financial Accounting Standards (SFAS) No. 109, "Accounting for Income Taxes" ("SFAS 109"). The first step is to evaluate the tax position for recognition by determining if the weight of available evidence indicates that it is more likely than not that the position will be sustained on audit, including resolution of related appeals or litigation processes, if any. The second step is to measure the tax benefit as the largest amount that is more than 50% likely of being realized upon settlement. Significant judgment is required in evaluating our uncertain tax positions and determining our provision for income taxes. Although we believe our reserves are reasonable, no assurance can be given that the final tax outcome of these matters will not be different from that which is reflected in our historical income tax provisions and accruals. We adjust these reserves in light of changing facts and circumstances, such as the closing of a tax audit or the refinement of an estimate. To the extent that the final tax outcome of these matters is different than the amounts recorded, such differences will affect the provision for income taxes in the period in which such determination is made. The provision for income taxes includes the effect of reserve provisions and changes to reserves that are considered appropriate, as well as the related net interest. Significant judgment is also required in determining any valuation allowance recorded against deferred tax assets. In assessing the need for a valuation allowance, we consider all available evidence, including past operating results, estimates of future taxable income, and the feasibility of tax planning strategies. In the event that we change our determination as to the amount of deferred tax assets that can be realized, we will adjust our valuation allowance with a corresponding effect to the provision for income taxes in the period in which such determination is made. As a result of the implementation of FIN 48, our tax assets and liabilities did not differ from the assets and liabilities before adoption; therefore, we did not record any adjustments as of the adoption date. In addition, consistent with the provisions of FIN 48, we reclassified $9.8 million of income tax liabilities from current to non-current liabilities because payment of cash was not anticipated within one year of the balance sheet date and we were unable to make a reasonably reliable estimate when cash settlement with a taxing authority would occur. At the adoption date of December 31, 2006, we had $16.7 million of total gross unrecognized tax benefit of which $14.0 million (net of federal impact on state benefit) of unrecognized tax benefits would impact our effective tax rate if recognized. See Note 10—Income Taxes in the Notes Consolidated Financial Statements in this Form 10-K, for additional information.

        The amount of income taxes we pay is subject to ongoing audits by federal, state and foreign tax authorities which might result in proposed assessments. Our estimate for the potential outcome for any uncertain tax issue is judgmental in nature. However, we believe we have adequately provided for any reasonable foreseeable outcome related to those matters. Our future results may include favorable or unfavorable adjustments to our estimated tax liabilities in the period the assessments are made or resolved or when statutes of limitation on potential assessments expire.

        We have concluded that it is still more likely than not that we will be able to realize all of our domestic deferred tax assets. For the deferred tax assets resulting from foreign net operating losses we have concluded that it is more likely than not that this asset will not be utilized and therefore, we have recorded a full valuation allowance for those deferred tax assets.

        We calculate our current and deferred tax provision based on estimates and assumptions that could differ from the actual results reflected in income tax returns filed. Differences between our tax provision and tax return may occur and such adjustments are recorded when identified.

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        Stock-Based Compensation:    In accordance with SFAS No. 123 (revised 2004), we measure compensation expense for all employee share-based payment awards using a fair value based method, reduced by estimated award forfeitures, and record such expense in our consolidated statements of operations.

        We consider our accounting policy for share-based compensation to be critical as determining the fair value of awards involves the use of significant estimates and assumptions. We use the Black-Scholes option pricing model to determine the fair value of stock options and employee stock purchase plan shares. The Black-Scholes option-pricing model requires the use of input assumptions, including the expected life, expected price volatility of the underlying stock, expected dividend yield and risk-free interest rate. The Black-Scholes option pricing model was developed for use in estimating the fair value of traded options, which have no vesting restrictions and are fully transferable. Because our stock options have characteristics significantly different from those of traded options, changes to the input assumptions can materially affect the fair value of our employee stock options. SFAS No. 123(R) also requires us to develop an estimate of the number of share-based payment awards that we expect to vest. We consider many factors when estimating expected forfeitures, including the type of award and historical experience, and revise those estimates in subsequent periods if actual forfeitures differ from those estimates. We use historical data to estimate pre-vesting option forfeitures and record stock-based compensation expense only for those awards that are expected to vest.

        The most significant assumptions impacted by management's judgment are the expected volatility and the expected life of the options. We base the risk-free interest rate on zero-coupon yields implied from U.S. Treasury issues with remaining terms similar to the expected term on the options. We do not anticipate paying any cash dividends in the foreseeable future and therefore use an expected dividend yield of zero in the option pricing model.

        Expected volatility.    The value of a stock option is derived from its potential for appreciation. The more volatile the stock, the more valuable the option becomes because of the greater possibility of significant changes in stock price. Our computation of expected volatility is based on a blend of historical volatility of our common stock and implied volatility of traded options to purchase shares of our common stock. Our decision to incorporate implied volatility was based on our assessment that implied volatility of publicly traded options in our common stock is expected to be more reflective of market conditions and, therefore, can reasonably be expected to be a better indicator of expected volatility than historical volatility of our common stock.

        Expected life.    The expected life also has a significant effect on the value of the option. The longer the term, the more time the option holder has to allow the stock price to increase without a cash investment and thus, the more valuable the option. Further, longer option terms provide more opportunity to exploit market highs. However, employees are not required to wait until the end of the contractual term of a nontransferable option to exercise. Accordingly, we are required to estimate the expected term of the option. When establishing the expected life of a newly granted option, the Company applies the simplified method approach as outlined in Staff Accounting Bulleting No. 110. The simplified method is based on the vesting period and the contractual term for each grant, or for each vesting-tranche for awards with graded vesting. The mid-point between the vesting date and the expiration date is used as the expected term under this method.

        We review our valuation assumptions at each grant date and, as a result, we are likely to change our valuation assumptions used to value stock based awards granted in future periods. Changes to the input assumptions could materially affect the estimated fair value of our share-based payment awards.

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Results of Operations

        The following table sets forth our operating results as a percentage of revenues:

Fiscal Years Ended December 27, 2008 and December 29, 2007

Revenues

        Total revenues declined by 54.5%, or $252.0 million, in fiscal 2008 as compared to fiscal 2007 primarily due to weak demand for our advanced wafer probe cards caused by the downturn in the semiconductor market. For certain of our products we also experienced pricing pressure in light of the availability of competitive products, which also contributed to the decrease in revenues.

        Our revenues for fiscal 2008 were primarily generated by sales of wafer probe cards to manufacturers of DRAM devices. Revenues for our products that address the DRAM segment decreased significantly in fiscal 2008 compared to fiscal 2007 primarily due to weak market conditions in which DRAM device pricing fell precipitously, to pricing pressure from our customers on certain of our DRAM products due to the competitive environment, and from increased competition. Given the price trend of DRAM devices in fiscal 2008, our customers that manufacture DRAM devices took certain actions to curtail spending and conserve cash, including decisions to delay test capacity expansions and ramping of key devices.

        Revenues from sales to Flash memory device manufacturers also decreased significantly in fiscal 2008 compared to fiscal 2007 primarily due to sales decline of our NOR Flash wafer probe cards in light of the reduced product ordering pattern of one of our primary NOR Flash device customers, to

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pricing pressure from our customers on certain of our Flash products due to the competitive environment, and from increased competition for full wafer contactor products in the NAND flash market. Market conditions for Flash memory devices weakened during fiscal 2008 and, as a consequence, our customers that manufacture Flash memory devices took certain actions similar to our DRAM customers which. in turn, impacted the demand for our products. The weakness in NOR Flash can be attributed to certain key customers pushing their production ramp of 65-nanometer into 2009. We also experienced market share reduction as a result of pricing pressure on certain Flash memory products due to the competitive environment.

        Revenues from manufacturers of SoC devices decreased in fiscal 2008 as compared to fiscal 2007 primarily due to delayed production ramp of a key customer's ongoing transition to advanced technology nodes in both chipset application and high performance flip-chip microprocessors, which are used in personal computer, gaming and graphics applications. This revenue decline was partly offset by growth in the Wire-bond SoC market segment.

        We have experienced continued pressure on revenues resulting from the global economic downturn and continued economic uncertainty, particularly as it relates to the lower demand for devices manufactured by our semiconductor customers. We expect weak demand for our products that address the DRAM, Flash and SoC segments to persist, which will affect our revenues and profitability into fiscal 2009. If our customers continue to defer purchases of our products until general economic and semiconductor market conditions improve, our business and operating results will be adversely affected. Given the nature of the global macroeconomic weakness, the current downturn in the semiconductor industry and its effects on demand for our products, we are unable to precisely forecast when or if revenues and profitability will return to previous levels.

Revenue by Geographic Region

        The following table sets forth our revenues by geographic region for the periods indicated:

        Geographic revenue information is based on the location to which we send the customer invoices. For example, certain South Korean customers purchase through their North American subsidiaries and accordingly, revenues derived from sales to such customers are reflected in North America revenues. The decrease in revenues across all geographic regions was due to generally to the semiconductor industry downturn, characterized by weak demand for semiconductor devices, delayed production ramps and weak device pricing environments.

Gross Profit

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        Gross margin fluctuates with revenue levels, product mix, selling prices, factory loading, and material costs. For fiscal 2008, gross margin declined compared to fiscal 2007 primarily due to the significant decline in revenue driving lower factory utilization, thereby increasing unit manufacturing costs, as well as inventory write-downs and declines in average selling prices. This decline was partially mitigated by lower personnel costs as a result of our fiscal 2008 global cost reduction plans. Excess custom inventories are not uncommon as our advanced wafer probe cards are custom designs that must be delivered on relatively short lead-times, and often requires us to acquire and start certain production activities prior to a firm customer commitment. Charge-offs to inventories increased from $12.7 million or 2.7% of revenues in fiscal 2007 to $16.3 million or 7.7% of revenues in fiscal 2008 due primarily to customer cancellations. Gross margin for fiscal 2008 includes stock-based compensation expense of $4.8 million, or 2.2% of revenue compared to $5.4 million, or 1.2% of revenue for fiscal 2007. The decline, in absolute dollars, was primarily as a result of reductions in headcount as a result of our 2008 global cost reduction plans.

        In future periods, we may be required to record additional inventory write-downs if estimated average selling prices of products held in finished goods and work in process inventories at a quarter-end date are below the manufacturing cost of those products. Additionally, near term gross margins will likely be adversely affected by lower levels of product revenues in comparison to the same periods in the prior fiscal year.

Research and Development

        Research and development expenses increased in absolute dollars in fiscal 2008 as compared to fiscal 2007 primarily due to an increase in product development related costs offset by a decrease in personnel costs. During fiscal 2008, expenses related to new technology and product development increased $5.2 million, and depreciation and facilities and information technology allocations increased $0.7 million due to investment in research and development facilities and development equipment. In fiscal 2008 personnel costs decreased $1.3 million due to the work force reductions as well as the temporary suspension of our company's key employee bonus and profit sharing plans. Stock-based compensation included within research and development was $5.0 million for fiscal 2008 compared to $5.2 million for fiscal 2007, with the decrease in absolute dollars being primarily due to reductions in headcount as a result of our 2008 global reorganization plans.

        As a percent of revenues, research and development expenses increased in fiscal 2008 as compared to fiscal 2007 primarily due to the declining revenue base.

        Our future operating results depend significantly on our ability to timely deliver reliable, cost-effective products that meet our customers' testing requirements and that have a competitive advantage in our marketplace. To do this, we believe that we must continue to make substantial investments in our research and development. We are continuing our strategic investments in research and development, including the development of our next generation parallelism architecture and products, fine pitch memory and logic products, advanced MicroSpring interconnect technology and new process technologies. We remain committed to product development in new and emerging technologies.

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Selling, General and Administrative

        Selling, general and administrative expenses increased in absolute dollars in fiscal 2008 compared to fiscal 2007 primarily due to an increase in legal costs and allowance for doubtful accounts offset in part by a decrease in personnel costs. During fiscal 2008, outside legal services incurred for protecting our intellectual property portfolio, tax services and other expenses increased by approximately $5.1 million, provision for doubtful debts increased by $4.1 million primarily due to the heightened risk of collection from a customer, and personnel related costs decreased by approximately $2.7 million primarily due to the work force reductions as well as the temporary suspension of our key employee bonus plan and profit sharing plan. In addition, stock-based compensation included within selling, general and administrative expense was $12.4 million for fiscal 2008 compared to $15.3 million for fiscal 2007, the decrease being primarily due to reductions in headcount as a result of our 2008 global reorganization plans.

        As a percent of revenue, selling, general and administrative expenses increased in fiscal 2008 as compared to fiscal 2007 primarily due to the declining revenue base.

Restructuring

        In both the first and second quarters of fiscal 2008, we implemented global cost reduction plans that included reducing our global workforce. As part of the first quarter action, our workforce was reduced by 14% and as part of the second quarter action, we reduced our workforce by 12%. The first quarter action also included facility consolidation charges related to vacating buildings in Livermore, California. Both plans were implemented to restructure our company to better align with the market environment. All expenses, including adjustments associated with our restructuring plans are included in "Restructuring" in the Consolidated Statements of Operations. During fiscal 2008, we paid $6.9 million, representing substantially all of the employee related expenses for the cost reduction plans and $0.3 million primarily related to a non-cancellable contract. The remaining employee-related charges will be paid in the first half of fiscal 2009. See Note 5 of Notes to the Consolidated Financial Statements.

Impairment of long-lived assets

        In the fourth quarter of fiscal 2008, we recorded an impairment charge of $4.4 million related to construction in-progress assets in Singapore based on our decision not to proceed with the construction of a new manufacturing facility at the proposed site in Singapore. The impaired

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construction-in-progress assets consisted primarily of building design costs as well as costs of temporary construction structures.

Interest and Other Income (Expense), Net

        The decrease in interest income on cash, cash equivalents and marketable securities was primarily a result of lower interest rates and lower average cash balances during fiscal 2008 as compared to fiscal 2007. Seeking greater investment safety, we re-allocated our investment securities from longer maturity, higher yield municipal securities to U. S. government and agency shorter maturity securities during fiscal 2008. Weighted average yields for fiscal 2008 and fiscal 2007 were 2.29% and 4.39%, respectively. Cash, cash equivalents, restricted cash and marketable securities totaled $523.6 million at December 27, 2008 compared to $572.2 million at December 29, 2007 with the decrease caused by our company's use of cash for operating activities in fiscal 2008, partially offset by cash provided by investing and financing activities. Other income (expense) for fiscal 2008 consisted primarily of realized gains related to the sale of investments and net foreign currency gains related to Japanese Yen, offset in part by bank fees. Other income (expense) for fiscal 2007 consisted primarily of net foreign currency gains related to Japanese Yen, miscellaneous income, offset by bank fees.

(Benefit from) Provision for Income Taxes

        Our effective income tax rate was a benefit 35.5% in fiscal year 2008 versus a provision of 37.3% in fiscal 2007. The fiscal 2008 benefit was negatively impacted by tax charges for tax losses in Singapore but was positively impacted by the reinstatement of the U.S. federal research and development credit and the favorable resolution of issues related to our company's 2004-2006 IRS examination during 2008. The Singapore losses are due to the initial phase of a worldwide structure implemented to align our worldwide affiliates with the geographic mix of our customers. In 2007, we initiated the first phase of our current plan to establish operations in Singapore to provide operational and financial services to the region. A significant element of the new structure involves the sharing of certain expenses related to the ongoing development of intangible property. Tax charges to implement the new structure negatively impacted the effective tax rate by approximately 4 and 7 percentage points in fiscal 2008 and 2007, respectively. These charges consisted primarily of payments associated with our intellectual property shared between Singapore and the U. S. We anticipate that our effective tax rate will be in the mid 30% range in fiscal 2009 and possibly a lower rate in future years depending on profitability and the taxing jurisdiction as we begin to realize operational and tax efficiencies resulting from this alignment plan and improvement of the current economic and semiconductor industry climate.

        On October 3, 2008, the Emergency Economic Stabilization Act of 2008 was signed into law. Under this law, the research tax credit was retroactively extended through January 1, 2010 from December 31, 2007. This extension of the credit benefited our fourth quarter and full year effective tax

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rate by less than one percentage point. The California 2008-2009 Budget Bill (Assembly Bill 1452), enacted on September 30, 2008, resulted in two temporary changes to the California income tax. First, the bill suspends the use of net operating loss carryovers for the fiscal 2008 and 2009. Second, the bill limits the use of research tax credit carryovers to no more than 50% of the tax liability before credits. While these changes did not affect our 2008 effective tax rate, they may impact our 2009 tax provision depending on our profitability in 2009.

Fiscal Years Ended December 29, 2007 and December 30, 2006

Revenues

        Revenues increased 25.2% in fiscal 2007 compared to fiscal 2006.

        Our revenues for fiscal 2007 were primarily generated by sales of wafer probe cards to manufacturers of DRAM devices, which accounted for more than half of our revenue growth in fiscal 2007. The increase was driven by accelerated tooling cycles for probe cards as a result of our customers' continued migration to 70 nanometer nodes to reduce their cost of test and improve productivity, and by volume production ramps for 1 Gb devices. Additionally applications such as mobile RAM and graphic RAM contributed to our DRAM revenue growth. The increase in DRAM revenues was offset by a seasonal weakness in the mobile DRAM business due to decreased demand for mobile and consumer applications. In the fourth quarter, the increase in DRAM revenues was also offset in part due to early execution issues with our Harmony architecture-based DRAM products. Approximately 75% of our DRAM revenues for fiscal 2007 were derived from 80 nanometer and below technology products compared to 14% for fiscal 2006.

        Revenues from sales to flash memory device manufacturers increased mainly due to increased demand for our NOR flash wafer probe cards by a significant customer whose high-volume ramp resulted from the growing demand for consumer applications which utilize multi-chip packages. Revenues generated from sales to flash memory device manufacturers also increased for our NAND flash wafer probe cards. Consumer applications which utilize multi-chip packages were a major driver for both categories of flash devices. Semiconductors that are integrated into multi-chip packages often benefit from increased wafer level testing to validate device performance before packaging.

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        Revenues from manufacturers of SoC devices increased primarily due to the new technology node transition for area array flip-chip microprocessor products and existing and key customers' engagements for our TrueScale applications in the mobile communications, digital consumer, and automotive controller markets.

Revenue by Geographic Region

        Geographic revenue information is based on the location to which we send the customer invoices. For example, certain South Korean customers purchase through their North American subsidiaries and accordingly, revenues derived from sales to such customers are reflected in North America revenues. The decrease in revenues in North America was due primarily to decreased sales related to product transitions combined with decreased customer demand resulting from new product delays. The increase in the percentage of revenues in Japan was primarily due to increased demand from one customer as a result of a major 70 nanometer and 1 GB tooling cycle. The increase in percentage of revenues in Asia Pacific was primarily due to growth in our business with Taiwan and South Korean customers and strong demand related to 70 nanometer and 1 GB transitions. Revenues in Europe were primarily flat year over year as a percent of total revenue.

Gross Profit

        The increase in gross margin in fiscal 2007 compared with fiscal 2006 was primarily due to higher revenues combined with improved factory productivity, cost reductions and lower charges for inventory reserves which in turn improved gross margin percentage. These improvements were partially offset by higher warranty expense associated with the introduction of a new product technology and in the fourth quarter, by lower production levels. Excess custom probe card inventory write-downs decreased from $17.6 million or 4.8% of revenues in fiscal 2006 to $12.7 million or 2.7% of revenues in fiscal 2007 due to cycle time reductions, increase in yields and improvement in our order fulfillment process. Excess custom inventories are not uncommon for us as our advanced wafer probe cards are custom designs manufactured in low volumes and must be delivered on relatively short lead-times, which requires us to acquire production materials and start certain production activities based on estimated production yields and forecasted demand prior to or in excess of actual demand for our wafer probe cards. Gross margin for fiscal 2007 includes additional stock-based compensation expense of $5.4 million, or 1.2% of revenue, compared to, $4.3 million, or 1.2% of revenue for fiscal 2006, due to the adoption of FAS 123(R) in the first quarter of fiscal 2006.

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Research and Development

        Research and development expenses increased for fiscal 2007 as compared to fiscal 2006 primarily due to an increase in personnel, new technology, product development related costs and facility expansion. Personnel costs increased $6.1 million due to increased headcount while expenses related to new technology and product development increased $6.4 million. Facilities related costs and depreciation increased $1.8 million due to new investment in R&D equipment and facilities expansion at our Livermore, California, facilities while stock-based compensation remained fairly consistent for the same periods. We continued the development of our next generation parallelism architecture and products, fine pitch memory and SoC products, advanced MicroSpring interconnect technology and new process technologies. We also made incremental investments in new technologies and products as we focus on new market opportunities.

Selling, General and Administrative

        Selling, general and administrative expenses increased for fiscal 2007 as compared to fiscal 2006 due to increases in expenses related to personnel costs, facilities expansion, outside legal and other professional fees and stock-based compensation. Personnel costs increased $10.2 million primarily due to increased headcount while facilities related costs and depreciation increased $0.8 million for fiscal 2007. Legal and other professional incurred for protecting our intellectual property portfolio, tax and accounting services, and other expenses increased $6.7 million. In addition, stock-based compensation expense also increased $3.3 million primarily due to increased headcount and the one-time modification charge of $1.4 million, incurred during the first quarter of fiscal 2007 resulting from the accelerated vesting of unvested stock options and restricted stock units in conjunction with the severance agreement of our company's former President.

Interest and Other Income (Expense), Net

        The increase in interest income was due to larger cash, cash equivalents and marketable securities balances throughout fiscal 2007 compared to fiscal 2006 while yields remained relatively flat. Cash, cash equivalents, restricted cash and marketable securities increased to $572.3 million at December 29, 2007 compared to $494.6 million at December 30, 2006. Other income for both fiscal 2007 and 2006 was mainly comprised of foreign currency gains, primarily related to Japanese Yen, and other expense.

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Provision for Income Taxes

        Our effective income tax rate was 37.3% in fiscal 2007 and 30.5% in fiscal 2006. The fiscal 2007 provision was impacted by tax charges related to our plan to align the structure of our worldwide affiliates with the geographic mix of our customers. To effect this alignment, we initiated the first phase of our current plan to establish operations in Singapore to provide operational and financial services to the region. A significant element of the new structure involves the sharing of certain expenses related to the ongoing development of intangible property. Tax charges to implement the new structure impacted the fiscal 2007 effective tax rate by approximately 7 percentage points. These charges consisted primarily of royalty prepayments associated with the buy-in for our transfer of intellectual property to Singapore that will be taxed in the U. S. and the loss of certain U.S. tax deductions related to research and development and certain other administration expenses. We anticipate that our effective tax rate will be in the mid 30% range in fiscal 2008 and 2009, and possibly a lower rate in future years, as we begins to realize operational and tax efficiencies resulting from this alignment plan.

Liquidity and Capital Resources

        Working capital:    The decrease in working capital in fiscal 2008 was primarily due to a decrease in our cash, cash equivalents and marketable securities balances caused by our company's use of cash for operating activities in fiscal 2008, partially offset by cash provided by investing and financing activities.

        Cash, cash equivalents and marketable securities:    Cash and cash equivalents consist of deposits held at major banks, money market funds and U. S. government securities that at the time of purchase had maturities of 90 days or less. Marketable securities consist of U. S. government and agency securities and municipal bonds. Cash, cash equivalents and marketable securities include $4.8 million held by our foreign subsidiaries as of December 27, 2008.

        Days sales outstanding from receivables, or DSO, was 87 days at December 27, 2008 compared with 45 days at December 29, 2007. The increase in DSO is primarily due to the increase in mix of customers with longer standard payment terms. In addition, with the recent challenges in the semiconductor market, a few of our customers which are in cash preservation mode are extending payments past their due dates.

        Cash flows from operating activities:    Net cash used in operating activities was primarily driven by the operating loss of $80.6 million incurred during the fiscal year ended December 27, 2008. Non-cash

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charges included in net loss consisted of $32.2 million of depreciation and amortization, $22.9 million of stock-based compensation, $16.3 million in reserves for excess and obsolete inventory, $4.1 million in reserves for doubtful accounts and $4.4 million of asset impairment charges. The net change in operating assets and liabilities in the fiscal year ended December 27, 2008 of $5.1 million consisted primarily of an increase in inventories and refundable income taxes and increase in an accounts payable and accrued liabilities, offset by a decrease in accounts receivable.

        Cash flows from investing activities:    The cash flows provided by investing activities in fiscal 2008 primarily relate to the proceeds from the sale and maturities of a portion of our investment portfolio consisting primarily of municipal bonds offset in part by the purchase of U.S. government and agency securities. In addition, cash was used for capital expenditures in support of new product technology, factory capability, and service center and information technology system upgrades.

        We carefully monitor our investments to minimize risks and have not experienced other-than-temporary investment losses. Except for experiencing declining yields, our investment portfolio has not been negatively impacted by the recent economic turmoil in the credit markets.

        Cash flows from financing activities:    The cash flows provided by financing activities in fiscal 2008 were primarily attributable to net proceeds from the exercise of stock options and purchases under our 2002 Employee Stock Purchase Plan, or ESPP. Tax benefits related to the exercise of stock options during the fiscal year ended December 27, 2008 were significantly lower than tax benefits for the fiscal year ended December 29, 2007 due to the decrease in stock option exercises.

        Our available cash, cash equivalents and marketable securities declined in each quarter of fiscal 2008. Given the uncertainty in the global economy and the downturn in the semiconductor industry coupled with the decrease in demand for our products, we are focusing on improving our operating efficiency to achieve operating cash flow break even. Our actions have included operational expense reduction initiatives, re-timing or eliminating certain capital spending and research and development projects and re-negotiating longer payment terms with our vendors. We believe that we will be able to satisfy our working capital requirements for the next twelve months with the liquidity provided by our existing cash, cash equivalents and marketable securities. We are also considering to establish manufacturing and technology partnerships, or to seek short- and long-term debt obligations, or to obtain new financing facilities which may not be available on terms favorable to us or at all. Our future capital requirements may vary materially from those now planned. However, if we are unsuccessful in improving our operating efficiency, reducing our cash outlays or increasing our available cash through financing, our cash, cash equivalents and marketable securities will further decline in the first quarter of fiscal 2009.

        The following table describes our commitments to settle contractual obligations in cash as of December 27, 2008: