QUICKLOGIC Corp - Annual Report: 2006 (Form 10-K)

UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

 

For the transition period from                  to                 

Commission File Number: 000-22671

QUICKLOGIC CORPORATION

(Exact name of registrant as specified in its charter)

 

1277 Orleans Drive
Sunnyvale, CA 94089

(Address of principal executive offices, including zip code)

Registrant’s telephone number, including area code: (408) 990-4000

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act: Common Stock, $0.001 par value

Rights to Purchase Series A Junior Participating Preferred Stock

(Title of Class)

Indicate by check mark if the registrant is a well-known seasoned issuer, as defined in Rule 405 of the Securities Act. Yes o  No x

Indicate by check mark if the registrant is not required to file reports pursuant to Section 13 or Section 15(d) of the Exchange Act. Yes o  No x

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes x  No o

Indicate by check mark if disclosure of delinquent filers pursuant to item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. x

Indicate by check mark whether the registrant is a large accelerated filer, an accelerated filer, or a non-accelerated filer. See definition of “accelerated filer and large accelerated filer” in Rule 12b-2 of the Exchange Act.

Large accelerated filer  o      Accelerated filer  x      Non-accelerated filer  o

Indicate by check mark whether the registrant is a shell company (as defined in Rule 12b-2 of the Exchange Act).

Yes o  No x

The aggregate market value of voting stock held by non-affiliates of the registrant as of July 3, 2005, the Registrant’s most recently completed second fiscal quarter, was $73,628,000 based upon the last sales price reported for such date on the Nasdaq National Market. For purposes of this disclosure, shares of common stock held by persons who hold more than 5% of the outstanding shares of common stock and shares held by executive officers and directors of the registrant have been excluded in that such persons may be deemed to be affiliates. This determination is not necessarily conclusive.

At March 10, 2006 Registrant had outstanding 28,246,494 shares of common stock.

DOCUMENTS INCORPORATED BY REFERENCE

Items 10, 11, 12, 13 and 14 of Part III of this Form 10-K incorporate information by reference from the Proxy Statement for the Registrant’s Annual Meeting of Stockholders to be held on or about April 25, 2006.

TABLE OF CONTENTS

 

 

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EXPLANATORY NOTE

This Annual Report on Form 10-K contains forward-looking statements within the meaning of the Private Securities Litigation Reform Act of 1995, that involve risks and uncertainties, as well as assumptions that, if they do not fully materialize or prove incorrect, could cause the business and results of operations of QuickLogic Corporation (“we”, “us” or “our”) to differ materially from those expressed or implied by such forward-looking statements. Such forward-looking statements include, without limitation, any projections of earnings, revenue or financial items, any statements of the plans, strategies and objectives of management for future operations, any statements concerning proposed new products, any statements regarding future economic conditions or performance, any statements relating to our projected capital expenditures, any statements of belief and any statements of assumptions underlying the foregoing.

The risks, uncertainties and assumptions referred to above that could cause our results to differ materially from the results expressed or implied by such forward-looking statements include, but are not limited to, those discussed under the heading “Risk Factors” in Item 1A hereto and the risks, uncertainties and assumptions discussed from time to time in our other public filings and public announcements. All forward-looking statements included in this document are based on information available to us as of the date hereof, and we assume no obligation to update these forward-looking statements.

PART I

ITEM 1.                BUSINESS

Overview

QuickLogic Corporation, founded in 1988 and reincorporated in Delaware in 1999, operates in a single industry segment where it designs and sells field programmable gate arrays, or FPGAs, Embedded Standard Products, or ESPs, associated design software, and programming hardware. Our FPGA and ESP devices are standard products that can be programmed to perform desired logic functions. In 1991, we introduced our first FPGA products based upon our ViaLink™ technology. We believe that the underlying attributes of our ViaLink technology, including low power consumption, high reliability, design security and design efficiency, enable us to deliver differentiated silicon solutions to our customers.

Our objective is to be the leading provider of the lowest-power programmable logic solutions. We believe that our products provide our customers with the lowest power consumption and highest intellectual property, or IP, security of all full-featured FPGA programmable logic devices. We believe our products enable system manufacturers to improve their time-to-market, to lower total power consumption and to add features or performance to their embedded applications.

Competitively, our products can offer significant power savings, performance, time-to-market and design security benefits when compared to traditional FPGAs; lower cost of ownership, time-to-market and increased system flexibility benefits when compared to the use of application specific integrated circuits, or ASICs; and increased system flexibility, product differentiation and design security benefits when compared to application specific standard products, or ASSPs.

We designed our Eclipse™ II and QuickPCI® II products to provide a low-power solution for applications requiring medium to small amounts of programmable logic. Currently, Eclipse II and QuickPCI II devices are the lowest-power FPGA products available in the market. These devices offer low power consumption during all phases of operation—power-up, quiescent and dynamic operation. We began limited shipments of these products in 2004.

We announced our new PolarPro™ architecture and related FPGA products in November 2005. These products improve on our Eclipse II products by providing lower power consumption and a more cost-effective architecture. PolarPro combines the industry’s lowest-power FPGA with embedded circuitry for implementing high-bandwidth bus-to-bus interfaces. All device circuitry is optimized for low power

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consumption through the new and innovative Very Low Power, or VLP, mode which provides an instant ability to lower power consumption when the device function is not needed. Based on our engineering analysis of portable media player applications, we believe designers using PolarPro can extend battery life by as much as four times as compared to a standard product implementation, setting a new standard for low power consumption through the use of FPGAs. Our first PolarPro product, the QL1P100, is currently being sampled by customers and we expect it to be released for production by the second quarter of 2006. We expect to sample additional PolarPro products during 2006.

In addition to offering the lowest-power, full-featured FPGAs, our products also provide:

·       “Bulletproof” IP Security—we believe our products provide “bulletproof” programmable logic design security, since it is virtually impossible to clone or reverse engineer designs implemented using our ViaLink technology;

·       Small Form Factor—since our products do not require an additional device to store configuration data, we can provide single chip full-featured solutions, in packages as small as 8x8 millimeters;

·       Instant On—our ViaLink based products require no configuration bit stream and thus are live at power up. This is critical in applications that need to be active as soon as power is supplied; and

·       High Reliability—our ViaLink-based devices are consistently more robust in harsh environments than SRAM-based FPGA products, since ViaLink-based products do not rely on an SRAM-cell that is susceptible to alpha particles, or brownouts, to define and maintain their functionality.

The low power consumption, high performance, small form factor and fast time-to-market of our new products are ideal for power sensitive embedded applications that need to efficiently integrate storage, networking and/or graphics capabilities. These products are being designed into applications for markets and customers that are new to us, such as:

·       portable GPS products, where our devices allow a processor to access a micro hard disk drive and reduce total power consumption;

·       portable media players, where our devices allow a processor to access a micro hard disk drive;

·       cellular data cards, where our devices provide the lowest-power interface between a processor and a cellular radio; and

·       handheld POS terminals, where our devices provide Wi-Fi and storage connectivity through our intelligent bridge controllers.

Our newest products, Eclipse II, QuickPCI II and PolarPro, target power sensitive and power critical applications where system designers want to minimize power consumption, add features to a system, improve the performance of a system and achieve a fast time-to-market. Examples include:

·       handheld, battery powered consumer or professional consumer (prosumer) products, where battery life, time-to-market and system performance are critical;

·       mobile computing and embedded handheld applications, where battery life, system performance, product differentiation and time-to-market are critical;

·       “powered by wire” data communications and power sensitive industrial applications, where time-to-market, power dissipation and system performance are critical; and

·       gaming applications, where IP security and the high reliability of our products are critical.

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Our new products are also being designed into applications in our traditional markets, such as data communications, instrumentation and test and military-aerospace, where customers value the low power consumption, instant-on, IP security, reliability and fast time-to-market of our products.

We market a range of solutions to our customers, including:

·       complete solutions incorporating our devices, intellectual property and software drivers. These complete solutions are targeted at specific low-power application segments that have similar connectivity and performance requirements. By providing solutions for customers we increase their ability to meet the time-to-market pressures associated with their markets;

·       Embedded Standard Products incorporating a fixed function along with programmable logic in a low-power device. Our customers build on this “known good starting point” to develop unique solutions required for their products, which eliminates the need to acquire and assemble industry standard IP, thus reducing design risk and improving time-to-market; and

·       FPGAs which are general purpose FPGAs used by customers who value the low power consumption, high IP security, instant on and reliability of our devices. These products give customers the ability to create a design specifically tailored for their needs.

In addition to working directly with our customers, we partner with other technology companies to develop additional intellectual property, reference platforms and system software to provide application solutions. We work with processor manufacturers, such as Intel Corporation and Renesas Technology Corp., and companies that supply storage, networking or graphics components for embedded systems. The depth of these relationships varies depending on the partner and the dynamics of the end market being targeted, but is typically a co-marketing program that incorporates engineering collaboration, such as reference designs, joint account calls and promotional activities.

Our headquarters are located at 1277 Orleans Drive, Sunnyvale, California 94089. We can be reached at (408) 990-4000, and our website address is www.quicklogic.com. Our common stock trades on the Nasdaq National Market under the symbol “QUIK”.

Product Technology

Our proprietary ViaLink programmable metal-to-metal technology is the core of our competitive advantage in providing programmable logic solutions. Our ViaLink technology has lower electrical resistance and capacitance than other programmable technologies and, consequently, supports lower power consumption and higher signal-speed. Our ViaLink technology also provides our products with what we believe to be “bulletproof” intellectual property security, especially compared to SRAM-based FPGA or ASIC solutions, since it is practically impossible to clone or reverse engineer designs that are programmed using our one-time-programmable ViaLink technology. We believe intellectual property security is important to system designers who choose to implement proprietary algorithms or features in programmable logic. Our ViaLink-based products are “instant on” and operate immediately when power is applied to a system, unlike products from our larger SRAM-based competitors that require a configuration period when power is applied to a system. Our ViaLink technology allows us to create devices smaller than competitors’ comparable products, thereby minimizing silicon area and cost.

In addition, our user-programmable platform and design software facilitate full utilization of a device’s logic cells, clocks and input/output pins. Our architecture maximizes interconnects at every routing wire intersection, which allows more paths between logic cells. As a consequence, system designers are able to use our devices with smaller gate counts to implement their designs than if they had used competing FPGAs. The abundance of interconnect resources also provides a dense connection between the ASSP and the FPGA portions of Embedded Standard Products, and enables us to develop ESPs that support bandwidth intensive applications such as a 64-bit 66 MHz PCI controller.

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Our low-power, high performance ViaLink technology, Eclipse and PolarPro product architectures, ASSP design capabilities, software driver capabilities, user-programmable platform and proprietary software design tools allow us to provide our customers with a unique solution for their design requirements. Our Eclipse II and QuickPCI II devices continue to be the lowest-power FPGAs available in the industry today. Our recently announced PolarPro products take this low-power leadership to a new level. All three products address the requirements of power sensitive, portable applications by including embedded circuitry for implementing high-bandwidth bus-to-bus interfaces.

Our new PolarPro FPGA architecture addresses both the need to reduce power consumption and decrease system costs. PolarPro combines the industry’s lowest-power FPGA with embedded circuitry for implementing high-bandwidth bus-to-bus interfaces, including large arrays of on-chip dual-port SRAM with co-located asynchronous First-In, First-Out, or FIFO, controllers, DDR interfaces for highly cost effective memory expansion, and clock management units. All device circuitry is optimized for low power consumption through the new and innovative VLP mode, which provides an instant ability to lower power consumption when the device function is not needed. When put in VLP mode, we believe that our PolarPro products typically draw less than 10 microamps of quiescent current.

Our PolarPro products also exhibit the FPGA industry’s lowest dynamic power consumption, with operational power consumption up to three times lower over competitive alternatives. Based on our engineering analysis of portable media player applications, we believe designers using PolarPro can extend battery life by as much as four times as compared to a standard product implementation, setting a new standard for low power consumption through the use of FPGAs. In addition, PolarPro products include a new FPGA logic cell architecture, which delivers lower power consumption and twice the logic density of Eclipse II products, supporting lower costs and higher gross margin. Our first PolarPro product, the QL1P100, is being sampled today and we expect it to be released for production by the second quarter of 2006. We expect to sample additional PolarPro products during 2006.

We invented and pioneered ESP products. Our ESP products combine a programmable logic array with dedicated SRAM memory blocks, and may contain fixed functions such as Peripheral Component Interconnect, or PCI, Integrated Drive Electronics, or IDE, or a MIPS processor. These products combine the low power, security of intellectual property and competitive pricing of our other ViaLink-based products, with the proven performance and short time-to-market provided by incorporating additional standard features. For instance, many of today’s embedded electronic systems wish to provide connectivity using PCI or IDE in order to leverage low-cost display, networking and storage peripherals originally developed for the personal computer market. Implementing PCI or IDE on a semiconductor product requires multiple pins and increases costs, and as a result, the majority of embedded processor suppliers do not integrate PCI or IDE into their full line of microprocessors. Our products can provide a proven, cost-effective, low-power connection between the local bus of the processor and the display, networking or storage component. Finally, our ESP product families are supported with a range of comprehensive software and hardware development kits that allow developers to focus on adding value to the end product without the requirement of first becoming an expert on an industry-standard system bus.

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Industry Background

Competitive pressures are forcing system manufacturers to bring complex electronic systems to market with improved functionality in shorter design cycles using less engineering resources. Silicon suppliers are responding to these market forces with different classes of core silicon, which are highly integrated logic semiconductors used in complex systems to coordinate the functions of other semiconductors, such as memory. There are three classes of core silicon:

·       ASICs—ASICs are custom devices designed to meet the needs of one specific application for one end customer. Structured ASICs, a sub-category of ASICs, provide a limited amount of customization to broaden the applicability of a device for additional applications;

·       ASSPs—ASSPs are fixed-function devices designed to address a relatively narrow set of applications. These components typically integrate a number of common peripherals. The functionality of these devices is fixed prior to wafer fabrication; and

·       Programmable logic devices, or PLDs—PLDs are general-purpose devices, which can be used by a variety of electronic systems manufacturers, and are customized after purchase for a specific application. Field programmable gate arrays, or FPGAs, are a subset of this category, and are typically used to implement complex system functions.

Historically, systems manufacturers have relied heavily on ASICs to implement the advanced logic required for their products. ASICs provide high performance and can also provide low power consumption due to customized circuit design. ASICs can enable low unit costs when very large quantities are purchased. However, because ASICs are design-specific devices, they require long development and manufacturing cycles, which can extend or delay product introductions and are functional only for a very limited number of products. In addition, because of the expense associated with the design of ASICs, they are cost effective only if they can be manufactured in high volumes. Finally, once ASICs are manufactured, their functionality cannot typically be changed to respond to evolving market demands.

ASSPs have become widely utilized as industry standards have developed to address increasing system complexity and the need for communication between systems and system components. These standards include:

·       IDE, also referred to as ATAPI, which controls storage devices such as micro hard disk drives, CD-ROMs and DVDs;

·       PCI, mini-PCI and CardBus, which are standards developed to provide a high-performance, reliable and cost-effective method of connecting high-speed devices within a system;

·       Ethernet, a widely used local area network, or LAN, transport standard that controls the interconnection between systems;

·       Wireless LAN (also referred to as IEEE 802.11x or WLAN), which transfers information wirelessly between two or more discrete systems; and

·       Secure Digital Input/Output, or SDIO, which allows the secure exchange of data, enabling usage restrictions to satisfy copyright holders.

Compared to ASICs, ASSPs offer the systems designer shorter development time, proven functionality, lower risk and reduced development cost. Since the devices are offered broadly to the market, it is challenging for a systems supplier to solely leverage these devices to differentiate their product offering from that of their competitors. Additionally, since these devices are relatively generic when compared to ASICs, it is highly likely that a systems supplier will need to supplement the ASSP with additional components to meet their unique system requirements. Much like ASICs, these devices cannot be modified to support changing system requirements or to address new markets.

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Programmable logic devices are often used by system manufacturers to add logic features to their systems, to adapt to rapidly changing industry standards, to increase system performance or to reduce power consumption by performing logic functions in programmable logic instead of a microprocessor, or to supply a programmable connection between several ASSPs. Programmable logic has a fundamental advantage over an ASIC in that programmable logic enables shorter design cycles. In addition, PLDs are standard products sold to many customers for use in many applications with off-the-shelf availability. Since ASICs are custom components designed and manufactured to a customer specification, ASICs have a relatively long time-to-market, high technical risk and large development cost for the systems supplier. Because PLDs are programmable, they provide systems manufacturers with the flexibility to customize and thereby differentiate their systems or expand their served market, unlike ASSPs. PLDs also enable systems manufacturers to change the logic functionality of their systems after product introduction without the expense and time of redesigning an ASIC. However, PLDs are generally more expensive than ASSPs and ASICs of equivalent functionality because they require more silicon area and typically offer lower performance.

Industry Future: Addressing Power Critical and Power Sensitive High Performance Applications

We believe that major segments of the market for “core silicon”—the market for ASICs, ASSPs and PLDs—will be in power critical and power sensitive applications. Often, the competitive factors in these applications are high performance and low power. High performance and low power consumption are typically competing demands in these systems, where the selection of faster components generally increases power consumption. In addition, one way to increase the speed of logic semiconductors is to migrate fabrication to finer process geometries. However, current leakage and power consumption increase with finer process geometries.

We believe another trend in our industry is the trend away from designs implemented with ASICs toward designs implemented with programmable logic semiconductors. PLDs allow system designers to develop differentiated products with a very fast time-to-market, and they are winning more and more designs over ASICs as the unit cost of programmable logic semiconductors is reduced. There are fundamentally two classes of advanced PLDs: complex programmable logic devices, or CPLDs, and FPGAs. In handheld embedded applications, CPLDs typically provide low power consumption and low performance, while SRAM-based FPGAs offer high performance at the price of high power consumption and significantly lower battery life.

Traditionally, companies marketing power critical applications, such as handheld, battery powered audio players, used an ASIC System-on-a-Chip, or SoC, to add features and increase the performance of a system while maximizing battery life. However, the migration toward smaller and smaller process geometries has increased the time, cost and risk associated with ASIC designs, and only the highest volume applications can justify the development cost and development risk of this approach. Traditionally, CPLDs could be used with standard product embedded processors as a low-power alternative to perform logic functions inside these devices. However, the performance requirements are increasing in these systems as consumers look for a rich media experience beyond audio playback. CPLDs often do not provide the full-featured performance required by these systems. SRAM-based FPGAs can provide the required performance, but their power consumption is much higher and they are typically not suitable for handheld, battery-powered applications.

Further, we believe that the market for prosumer products—high-end, handheld, battery-powered consumer products—is expanding rapidly. In addition, we believe that more and more of these devices will incorporate a rich media experience, whether in the form of 3-D GPS graphics or streaming video capabilities. Our new products—the lowest-power FPGAs available in the market today—enable the long battery life and high performance required by these applications, while providing the traditional PLD benefits of fast time-to-market and significantly lower development costs.

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We believe that a significant market will develop for programmable logic semiconductors that offer full featured performance and low power consumption, to address the fast time-to-market, rich media experience and long battery life required by these systems. We further believe that full-featured FPGAs offering low power consumption will be used in other power critical and power sensitive applications.

QuickLogic’s Solutions

We have leveraged our proprietary, patented ViaLink technology to develop products with the low power consumption, high performance, design security, efficiency and price points demanded by our customers. We believe our products and solutions offer the following specific advantages:

·       Lower Power Consumption.  Our ViaLink technology results in lower power consumption as compared to FPGA devices that use SRAM technology. Our Eclipse II and QuickPCI II products have the lowest FPGA power consumption during power-up, quiescent and dynamic modes of operation.

The power characteristics of our new PolarPro products, which we announced in November 2005, were specifically designed with an architecture to improve on the low-power characteristics of our Eclipse II products. Our PolarPro products are optimized for low power consumption through the new VLP mode, which provides an instant ability to lower power consumption when a device function is not needed. Products in the VLP mode often draw less than 10 microamps of quiescent current. PolarPro devices also have the lowest dynamic power consumption in the FPGA industry.

In addition to offering the lowest-power FPGAs in the industry, we develop complete solutions for specific embedded, handheld applications. We believe these solutions can deliver SoC levels of power management due to the low power consumption of our FPGA technology and due to our ability to offload certain management and control functions from the processor into our low-power device.

·       Shorter Development Time. With embedded system designs incorporating multiple elements, designers must solve complex routing and timing issues between devices, and develop software drivers to enable communication between the embedded processor, operating system and peripheral devices.

Our complete solutions enable fast time-to-market by delivering an “out-of-the-box” solution to the system designer. These complete solutions, which we develop for specific low-power, high volume, embedded applications, include IP such as a processor interface and IDE, PCI or SDIO, proven routing and timing between the elements of the application, and the software drivers needed to enable communication in the application.

Our embedded standard products combine a standard function, such as PCI, SDIO, IDE or a MIPS processor, with programmable logic. This “known good starting point” enables a shorter design cycle since the system designer does not need to acquire and verify the IP.

Our FPGAs provide a significantly faster time-to-market and lower risk than ASIC or gate array designs.

·       Design Security. Our devices provide what we believe is “bulletproof” design security, since it is virtually impossible to clone or reverse engineer logic designs that are implemented using our ViaLink-based technology. Unlike SRAM-based FPGAs, our products do not require an external memory source for storing the logic design. This logic design is passed from the external memory to the SRAM FPGA in a bit stream, which is susceptible to copying. This means that the logic implemented in SRAM FPGAs can be easily cloned or reverse engineered. In addition, our ViaLink-based products are inherently more secure than ASIC devices, since all of the ViaLink programmable logic resides between metal layers and is not visible to reverse engineering equipment.

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·       Increased Performance for a Power Budget.  Our Eclipse II, QuickPCI II and PolarPro products are designed to provide high performance at very low power, making them a compelling choice for low-power embedded systems requiring relatively high bandwidth.

·       Lower Cost of Ownership.   We allow customers to bring products to market quickly and to preserve their investment in system software across multiple designs.

·       Instant On. Our ViaLink-based products require no configuration bit stream and thus are live at power up. This is critical in applications that need to be active immediately once power is applied.

·       Increased Reliability.  Since ViaLink-based products do not rely on an SRAM-cell to define and maintain functionality, the device’s continued operation is consistently more robust in harsh environments than SRAM-based FPGA products, which are vulnerable to alteration during brown-out or alpha particle strikes.

Our Eclipse II products consist of medium to low density FPGAs that have the lowest power consumption in the FPGA industry today. Designs using Eclipse II achieve significantly longer system battery life than designs based on rival FPGA architectures, due to ultra-low power consumption during power-up, quiescent, and dynamic states. Quiescent power consumption of the Eclipse II products is 40 to 150 times lower than other FPGAs of similar density.

Our recently announced PolarPro FPGA product architecture addresses both the need to reduce power consumption and decrease system costs. PolarPro includes a new Very Low Power mode, which can be used to instantly reduce power consumption when functions in our device are not being used. Our PolarPro products combine FPGA logic with embedded circuitry for implementing high-bandwidth bus-to-bus interfaces. We believe the attributes of our PolarPro products enable advanced SoC levels of energy management using our off-the-shelf standard product, extending battery life in portable applications by as much as four times.

We also feature QuickMIPS “programmable system-on-a-chip” ESP devices that blend a MIPS 32-bit RISC processor, common peripherals, such as Ethernet MACs, PCI and UARTs, a memory subsystem and programmable logic on a single piece of silicon. On-chip PCI and two Ethernet ports simplify the connection to a broad range of standard or emerging networking standards. The on-chip programmable logic can be used to implement proprietary algorithms such as data compression or encryption or to improve system performance by implementing functions in our programmable logic, thereby offloading the microprocessor and improving system performance while reducing power consumption. We offer our QuickMIPS customers development platforms and the ability to work with a variety of operating systems. As a result, designers can utilize proven hardware and software modules, greatly improving their time-to-market and reducing development risk.

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The QuickLogic Strategy

Our objective is to be the market leader in providing the lowest-power programmable logic solutions available in the industry. We believe that our patented, proprietary ViaLink technology allows us to deliver programmable logic solutions with the lowest power consumption and highest IP security in the FPGA industry, while meeting system performance requirements. We believe these devices enable system manufacturers to reduce power consumption, improve time-to-market and add features or performance to their embedded applications. To achieve our objective, we have adopted the following strategies:

Extend Technology Leadership

Our low-power, high performance ViaLink technology, Eclipse and PolarPro product architectures, ASSP design capabilities, software driver capabilities, user-programmable platform and proprietary software design tools allow us to provide our customers with a unique solution to their design requirements. Our Eclipse II and QuickPCI II devices are the lowest-power FPGAs available in the industry today. Our recently announced PolarPro products consume less power than Eclipse II and were designed with an architecture to meet the interconnect and system logic requirements of power sensitive and portable applications. Our PolarPro products are optimized for low power consumption through the new VLP mode, which provides an instant ability to lower power consumption when a device function is not needed. PolarPro addresses the interconnect and logic requirements of power sensitive, portable applications by including embedded circuitry for implementing high-bandwidth bus-to-bus interfaces, including large arrays of on-chip dual-port SRAM with co-located asynchronous First-In, First-Out, or FIFO, controllers, DDR interfaces for highly cost effective memory expansion, and clock management units. In addition, PolarPro products include a new FPGA logic cell architecture, which delivers twice the logic density of Eclipse II, supporting lower costs and higher gross margin. Our first PolarPro product, the QL1P100, is currently being sampled and we expect it to be released for production by the second quarter of 2006. We expect additional PolarPro products to be sampled during 2006.

We intend to continue to invest in the development of ViaLink technology, product architectures and intellectual property, and to utilize such developments in future product innovations. We also intend to focus engineering resources on developing the lowest-power programmable logic solutions available in the industry.

Provide a Range of Solutions

We recognize that our markets require a range of solutions, which we provide to our customers:

·       Complete Solutions: We provide out-of-the-box solutions for targeted power critical or power sensitive applications. We typically target applications where we have a compelling low-power advantage, identified customers and a large follow-on market potential. For instance, top-tier Original Design Manufacturers, or ODMs, supplying handheld, battery devices such as portable GPS systems or portable video recorders are looking for complete solutions that combine low power consumption and high performance. Our solutions combine the lowest-power FPGAs available in the industry today with intellectual property and software drivers required by these applications. Examples of intellectual property incorporated into these solutions include: processor interface; IDE interface for use with micro hard disk drives, DVDs or CDs; PCI interface to an Ethernet or a Wi-Fi module; and SDIO interface. We architect our programmable logic solutions to provide the lowest power consumption and high performance, and we can often use our standard products to deliver advanced SoC levels of power management by performing functions in our device instead of in system’s embedded processor. We demonstrate solutions to customers using our mobile application boards. This demonstration capability is a key element in the selection of our

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products by a potential customer, and we then work with the customer to provide a solution tailored for their specific application.

·       Embedded Standard Products. Our ESPs combine a standard function and programmable logic in a single device. The standard function is essentially a “known good starting point” for this class of customers, and they utilize our programmable logic to complete the design. Customers in the cellular data card business, for instance, start with our QuickPCI products and add custom logic and software drivers to complete their designs. Customers benefit from using our ESPs, which combine the ease-of-use, guaranteed functionality, high performance, low non-recurring engineering charges and immediate availability of ASSPs with the flexibility and time-to-market advantages of programmable logic.

·       Field Programmable Gate Arrays. Many customers choose to add value to their end products by using our FPGAs to implement unique system logic in their product designs. For instance, customers in the gaming industry or serving military markets value the “bulletproof” IP security, instant on, high performance and reliability of our FPGAs. To serve these customers, we deliver our ViaLink-based FPGAs as well as a complete environment for FPGA designs, including our QuickWorks and QuickTools development software, and programming hardware. During 2005, we expanded our capabilities by partnering with Mentor Graphics® to provide industry leading Synthesis and Simulation tools, as well as an interface to other industry standard electronic design automation, or EDA, tools.

Strategic Relationships

We partner with market leaders and key suppliers to expand our served market and speed our time-to-market.

·       Partnering with Leading Component Suppliers. The lowest power consumption, small form factor and high intellectual property security of our PolarPro, Eclipse II and QuickPCI II devices are compelling for other component suppliers, who can use our products in reference designs or application notes to expand their served markets. We are developing relationships with tier-one suppliers of embedded processors, storage components such as micro hard disk drives, and networking components such as Wireless LAN chipsets. The depth of these relationships varies depending on the partner and the dynamics of the end market being targeted, but is typically a co-marketing program that incorporates engineering collaboration, such as reference designs, joint account calls and promotional activities.

·       Partnering with our Key Suppliers. As a part of our product strategy, we have formed strategic relationships with Mentor Graphics Corporation, Tower Semiconductor Ltd., Amkor Technology, Inc. and other companies to expand the range of technology that we embed in our products. These alliances are an essential element of our product strategy and a source of competitive strength going forward. By leveraging the expertise of our partners in programmable logic EDA synthesis tools, intellectual property development, wafer fabrication, package engineering and assembly, we can devote our efforts to the development of targeted, well-defined products and solutions.

Create Innovative, Industry-Leading Customer Services

·       Providing Design Services. These services extend our customers’ technical capabilities and shorten their time-to-market by utilizing our experts in programmable logic design, software drivers and embedded systems as part of their design team.

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·       Developing “Beyond the Silicon” Products. These value-added services for system manufacturers include power-aware tools that enable customers to minimize power consumption during the early stages of application design; predefined system functions delivered as IP cores; software drivers; reference designs; unique intellectual property optimized for use in QuickLogic’s programmable devices; and technical support.

We continue to develop and implement innovative ways to serve and communicate with our customers. For example, our WebASIC service allows customers to transmit their design information to us and receive a QuickLogic ESP or FPGA device programmed with their design within one business day in North America and Europe or within two business days in Asia. In addition, our ProChannel web-based system allows our distributors to receive quotations, place orders for our products and view their order status over the Internet. This system complements the Electronic Data Interchange systems that we have used for the past several years with our largest customers.

Additionally, MyDesign.com, our secure design-support portal individualized for each of our customers, is an innovative way to serve and communicate with customers. It provides us with the ability to exchange information and advance system designs with our customers.

Customers and Markets

The following is a representative list by industry of our current customers and the markets in which they do business:

 

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A significant portion of our revenue comes from sales to customers located outside of the United States, distributors, and key customers. Please see Note 13 to our Consolidated Financial Statements.

In the past, there has not been a predictable seasonal pattern to our business.

Sales and Technical Support

We sell our products through a network of sales managers, independent sales representatives and point-of-sale distributors in North America, Europe and Asia. In addition to our corporate headquarters in Sunnyvale, we have regional sales operations in California, Minnesota, Texas, Massachusetts, New Hampshire, Pennsylvania and Maryland. We also have international sales operations in Canada, India, England, Germany, China, Japan, Hong Kong and Taiwan. Our sales personnel and independent sales representatives are responsible for sales and applications support for a given region of responsibility, generally focusing on major strategic accounts.

Our customers typically order our products through our distributors. Distributors also create demand for our devices, generally focusing on customers who are not directly served by our sales managers. Currently, we have two distributors in North America, and a network of 17 distributors throughout Europe and Asia to support our international business. These distributors work with our regional sales managers in discovering new opportunities and providing technical support and other value-added services.

Backlog

We do not believe that backlog as of any particular date is indicative of future results. A majority of our quarterly shipments are typically booked during the quarter. Our sales are made primarily pursuant to standard purchase orders issued by OEM and distributor customers. Under our standard terms and conditions, a significant portion of our backlog is subject to cancellation or reschedule by these customers. Our distributor backlog is also subject to price adjustments upon the resale of the related inventory, as a result the total value of our backlog is not indicative of the related revenue. We believe that generally only a small portion of our backlog, excluding orders received under end-of-life programs, is non-cancelable and that the dollar amount associated with the non-cancelable portion is not significant.

Competition

The semiconductor industry is intensely competitive and is characterized by constant technological change, rapid rates of product obsolescence and price erosion. A number of companies offer products that compete with one or more of our products. Our existing competitors include: suppliers of conventional standard products, such as PLX Technology; suppliers of CPLDs including Lattice Semiconductor and Altera; suppliers of FPGAs, particularly Xilinx and Actel; and suppliers of embedded processors, such as Freescale Semiconductor. Xilinx and Altera dominate the programmable logic market and have substantially greater revenue, market presence and financial resources than Actel, Lattice or us. Xilinx dominates the FPGA segment of the market while Altera dominates the CPLD segment of the market. As we introduce additional ESP and FPGA solutions, we will also face competition from standard product manufacturers who are already servicing or who may decide to enter the markets addressed by our solutions. In addition, we expect significant competition in the future from major domestic and international semiconductor suppliers and from suppliers of products based on new or emerging technologies.

We believe that important competitive factors in our market are power consumption, complete solutions, performance, price, form factor, length of development cycle, installed base of development systems, adaptability of products to specific applications, ease of use and functionality of development system software, reliability, design services, technical service and support, wafer fabrication and assembly capacity, sources of raw materials, market presence, financial strength and intellectual property protection.

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Research and Development

Our future success will depend to a large extent on our ability to rapidly develop and introduce new products and enhancements to our existing products that meet emerging industry standards and satisfy changing customer requirements. We have made and expect to continue to make substantial investments in research and development.

As of December 31, 2005, our research and development staff consisted of 53 employees working primarily in three locations: Canada, India and California.

·       Our process engineering group develops our proprietary ViaLink wafer manufacturing process, oversees product manufacturing and process development with our third-party foundries, and is involved in ongoing process improvements to increase yields and optimize device characteristics.

·       Our FPGA design engineering group develops high-performance programmable systems and analog circuits targeted for low-power embedded systems that can be used stand-alone or combined with standard functions to form ESPs.

·       Our ASSP design engineering group develops or integrates standard functions with a programmable system to produce ESPs.

·       Our FPGA software group develops the design libraries, interface routines and place and route software that allows our customers to use third-party design environments to develop designs for programmable systems and subsystems.

·       Our embedded systems group develops IP blocks and the software required to make complete solutions from our blank FPGAs or ESPs.

Manufacturing

We have close relationships with third-party manufacturers for our wafer fabrication, package assembly, testing and programming requirements to help ensure stability in the supply of our products and to allow us to focus our internal efforts on product design and sales.

We currently outsource our wafer manufacturing to Taiwan Semiconductor Manufacturing Company, or TSMC, Tower, Samsung Semiconductor, Inc., Kawasaki Microelectronics, Inc. and Cypress Semiconductor Corporation, or Cypress. TSMC manufactures our pASIC®3, QuickRAM and certain QuickPCI products using a four-layer metal, 0.35 micron complementary metal oxide semiconductor, or CMOS, process. TSMC also manufactures our Eclipse and other ESP products using a five-layer metal, 0.25 micron process on eight-inch wafers. Samsung and Kawasaki manufacture our ASSP products. We purchase products from TSMC, Samsung and Kawasaki on a purchase order basis.

Tower manufactures our Eclipse II, PolarPro and certain QuickPCI II and QuickMIPS devices using a six-layer metal, 0.18 micron CMOS process incorporating our ViaLink technology. We have invested $21.3 million in Tower as part of Tower’s efforts to build and equip their wafer fabrication facility. Our investment guarantees us a portion of their fabrication facility’s available wafer capacity at competitive pricing. Our Tower agreement provides for guaranteed capacity availability through at least 2010.

Cypress manufactures our pASIC1 and pASIC2 product families using a three-layer metal, 0.65 micron CMOS process on six-inch wafers. Our Cypress agreement provided for contractual capacity through December 2005. While Cypress has continued to provide us with capacity early in 2006, we currently expect Cypress will replace the equipment associated with our wafer fabrication process with equipment for other uses by the third quarter of 2006.

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Outsourcing of wafer manufacturing enables us to take advantage of these suppliers’ high-volume economies of scale. We may establish additional foundry relationships as such arrangements become economically useful or technically necessary.

We outsource our product packaging, testing and programming primarily to Amkor Technology, Inc. We recently entered into a contractual partnership with Amkor to provide package design services.

Product Revenue Transition

Our foundry agreement with the manufacturer that fabricates our pASIC1 and pASIC2 products expired at the end of 2005. We announced an end-of-life for these products in the first quarter of 2004 and asked our customers to take delivery of lifetime buy orders before the end of 2005. These product families contributed 44% of revenue in 2005 and 34% of revenue in the fourth quarter of 2005. We anticipate that revenue from these products will be zero by the third quarter of 2006. In order to grow our revenue from its current level after the end-of-life revenue period for our pASIC1 and pASIC2 products, we are dependent upon increased revenue from our existing product families, especially our new Eclipse II and QuickPCI II products, and the development of additional commercially successful new products, such as PolarPro. We believe that the market for our new products is significant and that we will be able to replace the loss of pASIC1 and pASIC2 revenue with revenue from new products.

Employees

As of December 31, 2005, we had a total of 146 employees worldwide. We believe that our future success will depend in part on our continued ability to attract, hire and retain qualified personnel. None of our employees are represented by a labor union, and we believe our employee relations are favorable.

Intellectual Property

Our future success and competitive position depend upon our ability to obtain and maintain the proprietary technology used in our principal products. We hold 95 U.S. patents and have four pending applications for additional U.S. patents containing claims covering various aspects of programmable integrated circuits, programmable interconnect structures and programmable metal devices. In Europe and Asia, we have been granted a total of three patents and have a total of six patent applications pending. Our issued patents expire between 2010 and 2021. We have also registered eight trademarks with the U.S. Patent and Trademark Office.

From time to time, we receive letters alleging patent infringement or inviting us to license other parties’ patents. We evaluate these requests on a case-by-case basis. Offers such as these may lead to litigation if we reject the opportunity to obtain the license or reject the other party’s demands.

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Executive Officers and Directors

The following table sets forth certain information concerning our current executive officers and directors as of February 28, 2006:

 

E. Thomas Hart has served as our President, Chief Executive Officer and a member of our Board of Directors since June 1994, and as our Chairman since April 2001. Prior to joining QuickLogic, Mr. Hart was Vice President and General Manager of the Advanced Networks Division at National Semiconductor Corporation, a semiconductor manufacturing company, where he worked from September 1992 to June 1994. Prior to joining National Semiconductor, Mr. Hart was a private consultant from February 1986 to September 1992 with Hart Weston International, a technology-based management consulting firm. Prior experience includes senior level management responsibilities in semiconductor operations, engineering, sales and marketing with several companies including Motorola, Inc., an electronics provider, and National Semiconductor. Mr. Hart holds a B.S.E.E. degree from the University of Washington.

Terry L. Barrette joined QuickLogic in 1998 and has served as Vice President, Operations since 2001 and Director of Manufacturing and Product Engineering since 1998. Prior to joining QuickLogic, Ms. Barrette was Director of Product Engineering and Manufacturing at GateField Corporation, a semiconductor manufacturer, from 1996 to 1998. Prior to joining GateField, Ms. Barrette was Manager of Test Engineering and Failure Analysis at LSI Logic from 1989 to 1996. Prior experience includes positions in product engineering, quality and reliability at GE Intersil, Intel and National Semiconductor. Ms. Barrette holds a B.S.E.E. degree from San Jose State University.

Carl M. Mills has served as our Vice President, Finance and Chief Financial Officer since August 2002. From November 2000 to July 2002, Mr. Mills was Vice President of Finance and Chief Financial Officer of AltoWeb, Inc., a software company. From November 1987 to September 2000, Mr. Mills held several positions, most recently Vice President of Finance and Chief Financial Officer, at WaferScale Integration, Inc., a producer of peripheral integrated circuits. Mr. Mills holds a B.S. degree and an M.B.A. degree from Santa Clara University.

Timothy Saxe joined QuickLogic in May 2001 and has served as our Vice President, Engineering since November 2001. From November 2000 to February 2001, Mr. Saxe was Vice President of FLASH Engineering at Actel Corporation, a semiconductor manufacturing company. Mr. Saxe joined GateField Corporation, a design verification tools and services company formerly known as Zycad, in June 1983 and was a founder of their semiconductor manufacturing division in 1993. Mr. Saxe became GateField’s Chief Executive Officer in February 1999 and served in that capacity until GateField was acquired by Actel in November 2000. Mr. Saxe holds a B.S.E.E. degree from North Carolina State University, and an M.S.E.E. degree and a Ph.D. in electrical engineering from Stanford University.

Jeffrey D. Sexton has served as our Vice President, Worldwide Sales and Marketing since January 2005 and as our Vice President, Worldwide Sales since August 2001. Between January 1995 and August 2001, he held several positions at National Semiconductor Corporation including Director of Distribution, Regional

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Sales Manager, Cisco Systems Global Account Manager and OEM Sales Engineer. Mr. Sexton holds a B.S.E.E. degree from Wright State University in Dayton, OH.

Michael J. Callahan has served as a member of our Board of Directors since July 1997. Since January 2004, Mr. Callahan has been the Chairman of Teknovus, Inc., a privately held company specializing in communications chipsets for subscriber access networks. From March 1990 through his semi-retirement in September 2000, Mr. Callahan served as Chairman of the Board, President and Chief Executive Officer of WaferScale Integration, Inc., a producer of peripheral integrated circuits. From 1987 to March 1990, Mr. Callahan was President of Monolithic Memories, Inc., a semiconductor manufacturing company. During this period Monolithic Memories became a subsidiary of Advanced Micro Devices, Inc., a semiconductor manufacturing company, where Mr. Callahan was Senior Vice President of Programmable Products. From 1978 to 1987, Mr. Callahan was employed by Monolithic Memories in various positions including Vice President of Operations and Chief Operating Officer. Prior to joining Monolithic Memories, he worked at Motorola Semiconductor for 16 years where he was Director of Research and Development as well as Director of Linear Operations. Mr. Callahan also serves on the Board of Micrel, Incorporated, which files reports pursuant to the Securities Exchange Act of 1934, or the Exchange Act, and is a provider of analog power, mixed-signal and digital semiconductor devices. Mr. Callahan holds a B.S.E.E. degree from the Massachusetts Institute of Technology.

Arturo Krueger has served as a member of our Board of Directors since September 2004. Mr. Krueger has more than 40 years of experience in systems architecture, semiconductor design and development, operations, marketing and technical as well as general management. Since February 2001, Mr. Krueger has been a consultant to OEM automobile manufacturers and to semiconductor companies serving the automotive and telecom markets. Mr. Krueger was Corporate Vice President and General Manager of Motorola’s Semiconductor Products Sector for Europe, Middle East and Africa (EMEA) from January 1998 until February 2001. Mr. Krueger was the Strategic and Technology/Systems advisor to the President of Motorola’s Semiconductor Products Sector from 1996 until January 1998. In addition, Mr. Krueger was the Director of the Advanced Architectural and Design Automation Lab at Motorola. Mr. Krueger is a director of Marvell Technology Group Ltd., which files reports pursuant to the Exchange Act. Marvell is a semiconductor provider of high-performance analog, mixed-signal, digital signal processing and embedded microprocessor integrated circuits. He holds an M.S. degree in Electrical Engineering from the Institute of Technology in Switzerland, and has studied Advanced Computer Science at the University of Minnesota.

Christine Russell has served as a member of our Board of Directors since June 2005. Ms. Russell served as Senior Vice President and Chief Financial Officer of OuterBay Technologies, Inc., a privately held software company enabling information lifecycle management for enterprise applications, from May 2005 until February 2006, when OuterBay was acquired by Hewlett-Packard Company. From October 2003 to May 2005, Ms. Russell served as the Chief Financial Officer of Ceva, Inc., a company specializing in semiconductor intellectual property offering digital signal processing cores and application software, which files reports pursuant to the Exchange Act. From October 1997 to October 2003, Ms. Russell served as the Chief Financial Officer of Persistence Software, Inc., a company specializing in enterprise software providing infrastructure for distributed computing, which files reports pursuant to the Exchange Act. Prior to 1997, Ms. Russell served for more than twenty years in senior financial management positions with a variety of technology companies. Ms. Russell is a director of Peak International, Inc., which files reports pursuant to the Exchange Act. Peak is a supplier of precision-engineered packaging products for storage, transportation and automated handling of high technology products. Ms. Russell holds a B.A. degree and an M.B.A. degree from the University of Santa Clara.

Gary H. Tauss has served as a member of our Board of Directors since June 2002. Since May 2005, Mr. Tauss has been President, CEO and a director of InfiniRoute Networks Inc., which provides fully managed Voice over Internet Protocol, or VoIP, peering services for wireline and wireless carriers. From

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October 2002 until April 2005, Mr. Tauss served as President and CEO of LongBoard, Inc., or LongBoard, a company specializing in fixed to mobile convergence application software for leading carriers and service providers. From August 1998 until June 2002, Mr. Tauss was President, Chief Executive Officer and a director of TollBridge Technologies, Inc., or TollBridge, a developer of voice-over-broadband products. Prior to co-founding TollBridge, Mr. Tauss was Vice President and General Manager of Ramp Networks, Inc., a provider of Internet security and broadband access products, with responsibility for engineering, customer support and marketing. Mr. Tauss is a director of LongBoard. Mr. Tauss earned both a B.S. and an M.B.A. degree at the University of Illinois.

Executive Officers

Our executive officers are elected by, and serve at the discretion of, our board of directors. There are no family relationships among our directors and officers.

Additional Information

Our annual reports on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K, shelf registration statement on Form S-3 and amendments to those reports are made available, free of charge, on our website at www.quicklogic.com as soon as reasonably practicable after such reports are furnished to the Securities and Exchange Commission.

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ITEM 1A.        RISK FACTORS

We expect the announced end-of-life of our pASIC1 and pASIC2 products will result in a decline in our revenue

Our foundry agreement with the supplier that fabricates our pASIC1 and pASIC2 products expired on December 31, 2005. We announced an end-of-life for these products in 2004 and asked our customers to take delivery of lifetime buy orders before the end of 2005. We believe that a majority of our customers that use pASIC1 and pASIC2 products have purchased enough pASIC1 and pASIC2 product to satisfy demand through the expected life of their products rather than migrate to other QuickLogic products. As a result, we will experience a reduction in revenue from these products. Revenue from these products was $6.4 million, $5.1 million, $6.0 million and $3.5 million in the first, second, third and fourth quarters of 2005, respectively. We believe that revenue from these products may account for less than 10% of our revenue by the second quarter of 2006 and contribute no revenue by the third quarter of 2006. While we may have limited fabrication capacity for these products in 2006, we currently expect that the supplier will replace the equipment used to fabricate our devices with other equipment by the third quarter of 2006, which would end our ability to purchase additional wafers. Our operating results and liquidity will be adversely affected by the end-of-life of our pASIC1 and pASIC2 products. To mitigate the affects of the end-of-life of our pASIC1 and pASIC2 products, we plan to: migrate customers to other QuickLogic products; develop customer demand for new products, such as Eclipse II and QuickPCI II, which have strong customer design activity but limited revenue history; and increase revenue and gross profit from our other products. The pASIC1 and pASIC2 revenue decline may be more rapid than the revenue growth from our Eclipse II, QuickPCI II, PolarPro and other products. While we expect revenue growth from Eclipse II, QuickPCI II, other products and new products, such as PolarPro, will offset the expected decline in pASIC1 and pASIC2 revenue, there is no assurance when this will occur, if at all.

If we fail to successfully develop, introduce and sell new products, we may be unable to compete effectively in the future

We operate in a highly competitive, quickly changing environment marked by rapid obsolescence of existing products. To compete successfully, we must obtain access to advanced fabrication capacity and dedicate significant resources to specify, design, develop, manufacture and sell new or enhanced products and solutions that provide increasingly higher levels of performance, low power consumption, new features, reliability and/or cost savings to our customers. We experience a long delay between the time when we expend these product definition and development resources and invest in related long-lived assets, and the time when we begin to generate revenue, if any, from these expenditures.

We are marketing our Eclipse II, QuickPCI II and PolarPro products to new customers and markets and expect a significant portion of our future revenues to be generated from these new products. We believe our low-power Eclipse II, QuickPCI II and PolarPro products have a compelling advantage in low-power applications, and that this business will provide long-term revenue growth for QuickLogic, but there is no assurance when this will occur, if at all. Some of these opportunities are in the rapidly changing consumer market, which typically has shorter product life cycles, higher volumes and greater price pressure than our traditional business. In order to react quickly to market opportunities, we have made significant investments in Eclipse II and QuickMIPS inventory. If we are unable to design, produce and sell new products and solutions that meet design specifications, address customer requirements, and generate sufficient revenue and gross profit, if market demand for our products fails to materialize, or if our customers do not successfully introduce products incorporating our devices, our revenue and gross margin will be materially harmed and we may be required to write-off related inventory and long-lived assets or have other adverse effects on our business. For example, in the fourth quarter of 2004 we recorded a $3.2 million long-lived asset impairment charge related to our QuickMIPS products.

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We may be unable to accurately estimate quarterly revenue, which could adversely affect the trading price of our stock

We offer our customers a short delivery lead-time and a majority of our shipments during a quarter are ordered by customers in that quarter. As a result, we often have low visibility to the current quarter’s revenue, and our revenue levels can change significantly in a short period of time. Furthermore, our ability to respond to increased demand is limited to inventory on hand or on order, the capacity available at our contract manufacturers and our capacity to program products to customer specifications. In addition, a significant portion of our revenue is deferred until our distributors ship unprogrammed parts to end customers since the price is not fixed or determinable until that time. Therefore, we are highly dependent on the accuracy and timeliness of resale and inventory reports from our distributors. Inaccurate distributor resale or inventory reports, as well as unanticipated changes in distributor inventory levels, could contribute to our difficulty in predicting and reporting our quarterly revenue and results of operations. If we fail to accurately estimate customer demand, record revenue, or if our available capacity is less than needed to meet customer demand, our results of operations could be harmed and our stock price could materially fluctuate.

Our future results depend on our relationship with Tower

We have invested approximately $21.3 million in Tower. In return for our investment, we received equity, prepaid wafer credits and committed production capacity in Tower’s foundry facility. We believe that Tower’s long-term operation of this fabrication facility depends on its ability to attract sufficient customer demand, to obtain additional financing, to obtain the release of grants and approvals for changes in grant programs from the Israeli government’s Investment Center, and its ability to remain in compliance with the terms of its grant and credit agreements. The current political uncertainty and security situation in the Middle East where Tower’s fabrication facility is located, the cyclical nature of the market for foundry manufacturing services, Tower’s financial condition, or other factors may adversely impact Tower’s business prospects and may discourage future investments in Tower from outside sources. We may decide to invest additional funds in Tower, which could have an impact on our cash position and liquidity. If Tower is unable to obtain adequate financing and increase production output in a timely manner, the value of our investment in Tower may decline significantly or possibly become worthless, our wafer credit from Tower may decline in value or possibly become worthless, and we would have to identify and qualify a substitute supplier to manufacture our products. This could require significant development time, cause product shipment delays, impair long-lived assets and the value of our wafer credits, damage our liquidity and severely harm our business. In addition, Tower solely manufactures our Eclipse II, PolarPro, certain QuickPCI II, QuickMIPS and other new products currently under development.

The value of our investment in Tower and its corresponding wafer credits may also be adversely affected by a deterioration of conditions in the market for foundry manufacturing services and the market for semiconductor products. At December 31, 2005, the aggregated value of our Tower investment and wafer credits recorded on our balance sheets was $6.2 million. If the fair value of our Tower investment or our wafer credits are deemed to be impaired, we will record charges to our statement of operations. For instance, the fair value of our Tower investment was $2.26 per share and $1.17 per share at the end of 2004 and the end of the second quarter of 2005, respectively. Since the value of our Tower investment remained below $2.26 per share for a period of time, we recorded a $1.5 million write-down of marketable securities in the second quarter of 2005.

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We will be unable to compete effectively if we fail to anticipate product opportunities based upon emerging technologies and standards and fail to develop products that incorporate these technologies and standards in a timely manner

We spend significant time and money to design and develop products and customer solutions around an industry standard, such as Peripheral Component Interconnect, or PCI, and Integrated Drive Electronics, or IDE, or emerging technology, such as advanced process technology or lead-free packaging. We intend to develop additional products and solutions and adopt new technology in the future. If system manufacturers adopt alternative standards or technologies, if an industry standard or emerging technology that we have targeted fails to achieve broad market acceptance, or if we are unable to bring the technology or solutions to market in a timely manner, we may be unable to generate significant revenue from our research and development efforts. As a result, our business would be materially harmed and we may be required to write-off related inventory and long-lived assets.

Our customers may cancel or change their product plans after we have expended substantial time and resources in the design of their products

Our customers often evaluate our products for six months or more before designing them into their systems, and they may not commence volume shipments for up to an additional six to twelve months, if at all. During this lengthy sales cycle, our potential customers may also cancel or change their product plans. In addition, customers may discontinue products incorporating our devices at any time or they may choose to replace our products with lower cost semiconductors. If customers cancel, reduce or delay product orders from us or choose not to release equipment that incorporates our products after we have spent substantial time and resources in assisting them with their product design, our business could be materially harmed.

We are expending substantial time and effort to develop solutions with partners that depend on the availability and success of technology owned by the partner

Our approach to developing system solutions for potential customers involves embedded processors or peripheral devices developed by other parties and specific industry standards such as PCI, IDE and Secure Digital Input/Output, or SDIO. We have entered into informal partnerships with these other parties that involve the development of solutions that interface with their devices. These informal partnerships also may involve joint marketing campaigns and sales calls. For example, we have developed a system solution incorporating a specific embedded processor, a micro hard disk drive and our Eclipse II device that lowers the overall power consumption of a system and improves system performance. If our solution is not incorporated into customer products, if our partners discontinue production of their products, if our customers do not incorporate our solution into their product, or if the informal partnership is significantly reduced or terminated, our revenue and gross margin will be materially harmed and we may be required to write-off related long-lived assets.

We depend upon third parties to fabricate, assemble, test and program our products, and they may discontinue manufacturing our products, fail to give our products priority, be unable to successfully manufacture our products to meet performance, volume or cost targets, or inaccurately report inventory to us

We contract with third parties to fabricate, assemble, test and program our devices. Our devices are generally fabricated, assembled and programmed by single suppliers, and the loss of a supplier, expiration of a supply agreement or the inability of our suppliers to manufacture our products to meet volume, performance and cost targets could have a material adverse effect on our business. Tower solely manufactures our Eclipse II, PolarPro, certain QuickPCI II, QuickMIPS and other new products currently under development. Furthermore, a single supplier fabricates our pASIC1 and pASIC2 products under an agreement that expired in December 2005. While we may be able to purchase limited pASIC1 and pASIC2

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wafers in 2006, these products contributed 44% of 2005 revenue and we anticipate that revenue from these products will be zero in the third quarter of 2006. In addition, demand for assembly capacity at one of our suppliers recently increased due to a fire at the facility of another supplier. As a result, capacity available to us may be constrained. Programming capacity at our suppliers is also dependent on our investment in sufficient programming hardware to meet fluctuating demand. Our relationship with our suppliers could change as a result of a merger or acquisition. If for any reason these suppliers or any other vendor becomes unable or unwilling to continue to provide services of acceptable quality, at acceptable costs and in a timely manner, our ability to operate our business or deliver our products to our customers could be severely impaired. We would have to identify and qualify substitute suppliers, which could be time consuming and difficult and could result in unforeseen operational problems, or we could announce an end-of-life program for these products, as we did with our pASIC1 and pASIC2 products. Alternate suppliers might not be available to fabricate, assemble, test and program our devices or, if available, might be unwilling or unable to offer services on acceptable terms.

In addition, if competition for wafer manufacturing capacity increases, if we need to migrate to more advanced wafer manufacturing technology, or if competition for backend services increases, we may be required to pay or invest significant amounts to secure access to this capacity. The number of companies that provide these services is limited and some of them have limited operating histories and financial resources. In the event our current suppliers refuse or are unable to continue to provide these services to us, we may be unable to procure services from alternate suppliers in a timely manner, if at all. Furthermore, if customer demand for our products increases, we may be unable to secure sufficient additional capacity from our current suppliers on commercially reasonable terms, if at all. Moreover, our reliance on a limited number of suppliers subjects us to reduced control over delivery schedules, quality assurance and costs. This lack of control may cause unforeseen product shortages or may increase our cost to manufacture and test our products, which would adversely affect our operating results and cash flows.

We record a majority of our inventory transactions based on information from our subcontractors. If we do not receive prompt and accurate information from our vendors, we could misstate inventory levels, incorrectly record gross profit, and be unable to meet our delivery commitments to customers or commit to manufacturing inventory that is not required to meet customer delivery commitments, which could materially harm our business.

We may not have the liquidity to support our future operations and capital requirements

Our cash and cash equivalents balance at December 31, 2005 was $28.3 million. At December 31, 2005, our interest-bearing debt consisted of $1.4 million outstanding from Silicon Valley Bank and $1.5 million outstanding under a capital lease. On June 27, 2005, we modified our credit facility with Silicon Valley Bank. Terms of the modified agreement include an $8.0 million revolving line of credit available through June 2006 and $3.0 million of borrowing capacity under the equipment line of credit that is available to be drawn through June 2006. The credit facility expires on June 26, 2006. At December 31, 2005, we had approximately $5.8 million available to borrow under our revolving credit facility and approximately $3.0 million available to borrow under our equipment line of credit.

At the end of the fourth quarter of 2005, we held 1,344,543 Tower Ordinary Shares available for sale valued at approximately $2.0 million based upon the market closing price of $1.45 per share on such date. Our ability to obtain capacity at competitive pricing from Tower is tied to our ownership of at least 450,000 of these Tower shares.

Capital expenditures, which are largely driven by the introduction and initial manufacturing of new products and development activities, could be up to $4.0 million in the next twelve months. As of December 31, 2005, we had commitments to purchase $2.7 million of wafer inventory and a $1.6 million commitment to purchase software for development and resale.

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On July 12, 2005, we filed a shelf registration statement on Form S-3, which has been declared effective. Under this filing, we may decide to raise up to $30.0 million, in one or several transactions, by selling common stock, preferred stock, depositary shares, and warrants.

As a result of potential investments, the expected fluctuation in revenue from our pASIC1 and pASIC2 products, operating expenses, changes in working capital and interest and debt payments, we will need to generate higher revenue and gross profit, especially from our Eclipse II products, QuickPCI II products and products under development such as PolarPro, to maintain positive cash flow. Whether we can achieve cash flow levels sufficient to support our operations cannot be accurately predicted. Unless such cash flow levels are achieved, we may borrow additional funds or sell debt or equity securities, or some combination thereof, to provide funding for our operations. If adequate funds are not available when needed, our financial condition and operating results would be materially adversely affected and we may not be able to operate our business without significant changes in our operations, or at all.

If we fail to adequately forecast demand for our products, we may incur product shortages or excess product inventory

Our agreements with third-party manufacturers require us to provide forecasts of our anticipated manufacturing orders, and place binding manufacturing commitments in advance of receiving purchase orders from our customers. This may result in product shortages or excess product inventory because we are limited in our ability to increase or decrease our forecasts under such agreements. Other manufacturers supply us product on a purchase order basis. The allocation of capacity is determined solely by our suppliers over which we have no direct control. Additionally, we provide programming equipment to our suppliers to program our products to customer specifications. The programming equipment is manufactured to our specifications and has significant order lead-times. Obtaining additional supply in the face of product, programming equipment or capacity shortages may be costly, or not possible, especially in the short term since most of our products and programming equipment are supplied by a single vendor. Our failure to adequately forecast demand for our products could materially harm our business.

Fluctuations in our manufacturing processes and product yields and quality, especially for new products, may increase our costs

Difficulties encountered during the complex semiconductor manufacturing process can render a substantial percentage of semiconductor wafers nonfunctional, and manufacturing fluctuations may change the performance distribution of manufactured products. We have, in the recent past, experienced manufacturing runs that have contained substantially reduced or no functioning devices, or that generated devices with below normal performance characteristics. In addition, manufacturing yield problems may take a significant period of time to analyze and correct. Our reliance on third party suppliers may extend the period of time required to analyze and correct these problems. Once corrected, our customers may be required to redesign or requalify their products. As a result, we may incur substantially higher manufacturing costs, inventory shortages or reduced customer demand.

Yield fluctuations frequently occur in connection with the manufacture of newly introduced products, with changes in product architecture, with manufacturing at new facilities or on new manufacturing processes. Newly introduced products and products that incorporate new intellectual property, such as our Eclipse II and PolarPro products, are often more complex and more difficult to produce, increasing the risk of manufacturing-related defects. New manufacturing facilities or processes, such as at Tower, are often more complex and take a period of time to achieve expected quality levels and product costs. While we test our products, including our development tools, they may still contain errors or defects that are found after we have commenced commercial production, that occur due to manufacturing variations or as new intellectual property is incorporated into our products. If our products contain undetected or unresolved defects, we may lose market share, experience delays in or loss of market acceptance, reserve or

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scrap inventory, or be required to issue a product recall. In addition, we would be at risk of product liability litigation if defects in our products were discovered. Although we attempt to limit our liability to end users through disclaimers of special, consequential and indirect damages and similar provisions, we cannot assure you that such limitations of liability will be legally enforceable.

We have significant customers and limited visibility into the long-term demand for our products from these customers

A few of our end customers can represent a significant portion of our total revenue in a given reporting period and the likelihood of this occurring will increase in the future as we target high-volume consumer applications. As in the past, future demand from these customers may fluctuate significantly. These customers typically order products with short requested delivery lead times, and do not provide a firm commitment to purchase product past the period covered by purchase orders. In addition, our manufacturing lead times are longer than the delivery lead times requested by these customers, and we make significant inventory purchases in anticipation of future demand. For example, a U.S.-based instrumentation and test customer accounted for 13% of revenue in 2005. If revenue from any significant customer were to decline substantially, we may be unable to offset this decline with increased revenue from other customers and we may purchase excess inventory. These factors could severely harm our business.

In addition, we may make a significant investment in long-lived assets for the production of our products based upon historical and expected demand. If demand for or gross margin generated from our products does not meet our expectations, we may be required to write-off inventory or incur charges against long-lived assets, which would materially harm our business.

We have a history of losses and cannot assure you that we will remain profitable in the future

We incurred significant losses in 2004, 2003 and 2002. Our accumulated deficit as of December 31, 2005 was $117.3 million. Although we recorded net income of $2.4 million for the year ended December 31, 2005, we may not remain profitable in any future periods. Our profitability for the year ended December 31, 2005 and in certain years prior to 2001 cannot be relied upon as any indication of our future operating results or prospects.

We depend upon third party distributors to market and sell our products, and they may discontinue sale of our products, fail to give our products priority or be unable to successfully market, sell and support our products

We contract with third-party distributors to market and sell a significant portion of our products. We typically have only a few distributors serving each geographic market, and, in the future, we may have a single distributor covering a geographic market. Although we have contracts with our distributors, our agreements with them may be terminated on short notice by either party and, if terminated, we may be unable to recruit additional or replacement distributors. Additionally, distributors that we have contracted with may acquire, be acquired or merge with other distributors which may result in the termination of our contract or less effort being placed on the marketing, sale and support of our products. As a result, our future performance will depend in part on our ability to retain our existing distributors and attract new distributors that will be able to effectively market, sell and support our products. The loss of one or more of our principal distributors, or our inability to attract new distributors, could materially harm our business.

Many of our distributors, including our principal distributors, market and sell products for other companies, and many of these products may compete directly or indirectly with our products. We generally are not one of the principal suppliers of products to our distributors. If our distributors give higher priority or greater attention to the products of other companies, including products that compete with our products, our business would be materially harmed.

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Individual distributors and OEM customers often represent a significant portion of our accounts receivable. If we are unable to collect funds due from these distributors and customers, our financial results may be materially harmed.

Our future operating results are likely to fluctuate and therefore may fail to meet expectations, which could cause our stock price to decline

Our operating results have varied widely in the past and are likely to do so in the future. In addition, our past operating results may not be an indicator of future operating results. Our future operating results will depend on many factors and may fail to meet our expectations for a number of reasons, including those set forth in these risk factors. Any failure to meet expectations could cause our stock price to significantly fluctuate or decline.

Factors that could cause our operating results to fluctuate include:

·       the effect of end-of-life programs;

·       a significant change in sales to our largest customers;

·       successful development and market acceptance of our products and system solutions incorporating our products;

·       our ability to accurately forecast product volumes and mix, and to respond to rapid changes in customer demand;

·       changes in product mix, average selling prices or production variances that affect gross profit;

·       our ability to adjust our manufacturing capacity and costs in response to economic and competitive pressures;

·       our reliance on subcontract manufacturers for product capacity, yield and quality;

·       our competitors’ product portfolio and product pricing policies;

·       timely implementation of efficient manufacturing technologies;

·       changes in accounting and corporate governance rules;

·       impact of import and export laws and regulations;

·       the cyclical nature of the semiconductor industry and general economic, market, political and social conditions in the countries where we sell our products and the related effect on our customers, distributors and suppliers; and

·       our ability to obtain capital, debt financing and insurance on commercially reasonable terms.

Although certain of these factors are out of our immediate control, unless we can anticipate and be prepared with contingency plans that respond to these factors, our business may be materially harmed.

We may encounter periods of industry-wide semiconductor oversupply, resulting in pricing pressure, as well as undersupply, resulting in a risk that we could be unable to fulfill our customers’ requirements

The semiconductor industry has historically been characterized by wide fluctuations in the demand for, and supply of, its products. These fluctuations have resulted in circumstances when supply of and demand for semiconductors have been widely out of balance. An industry-wide semiconductor oversupply could result in severe downward pricing pressure from customers. In a market with undersupply of manufacturing capacity, we would have to compete with larger foundry and assembly customers for limited manufacturing resources. In such an environment, we may be unable to have our products manufactured in

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a timely manner, at a cost that generates adequate gross profit, or in sufficient quantities. Since we outsource all of our manufacturing and have only a single-source of wafer supply, test, assembly and programming for most of our products, we are particularly vulnerable to such supply shortages and capacity limitations. As a result, we may be unable to fulfill orders and may lose customers. Any future industry-wide oversupply or undersupply of semiconductors could materially harm our business.

Customers may cancel or defer significant purchase orders or our distributors may return our products, which would cause our inventory levels to increase and our revenue to decline

Our distributors or customers may cancel purchase orders at any time with little or no penalty. Contractually, our distributors are generally permitted to return unprogrammed products worth up to 10%, by value, of the products they purchase from us. If our distributors or customers cancel or defer significant purchase orders or return our products, our accounts receivable collections would decrease and inventories would increase, which would materially harm our business.

Problems associated with international business operations could affect our ability to manufacture and sell our products

Most of our products are manufactured outside of the United States at manufacturing facilities operated by our suppliers in Taiwan, South Korea, the Philippines, Israel and Malaysia. We expect to manufacture a majority of the products that we currently have under development in Israel and to assemble these products in South Korea, the Philippines, Malaysia, Wales or China. As a result, these manufacturing operations and new product introductions are subject to risks of political instability, including the risk of conflict between Taiwan and the People’s Republic of China, between South Korea and North Korea, and conflicts involving Israel or Malaysia.

A significant portion of our total revenue comes from sales to customers located outside the United States. We anticipate that sales to customers located outside the United States will continue to represent a significant portion of our total revenue in future periods. In addition, most of our domestic customers sell their products outside of North America, thereby indirectly exposing us to risks associated with foreign commerce and economic instability. In addition to overseas sales offices, we have significant research and development activities in Canada and India. Accordingly, our operations and revenue are subject to a number of risks associated with foreign commerce, including the following:

·       managing foreign distributors;

·       staffing and managing foreign offices;

·       political and economic instability;

·       foreign currency exchange fluctuations;

·       changes in tax laws, import and export regulations, tariffs and freight rates;

·       timing and availability of export licenses;

·       supplying products that meet local environmental regulations; and

·       inadequate protection of intellectual property rights.

In the past, we have denominated sales of our products to foreign countries exclusively in U.S. dollars. As a result, any increase in the value of the U.S. dollar relative to the local currency of a foreign country will increase the price of our products in that country so that our products become relatively more expensive to customers in the local currency of that foreign country. As a result, sales of our products in that foreign country may decline. To the extent any such risks materialize, our business could be materially harmed.

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In addition, we incur costs in foreign countries that may be difficult to reduce quickly because of employee-related laws and practices in those foreign countries.

Many system manufacturers may be unwilling to switch to our products because of their familiarity with the products offered by our direct competitors, such as Xilinx and Altera, which dominate the programmable logic market

The semiconductor industry is intensely competitive and characterized by:

·       erosion of selling prices over product lives;

·       rapid technological change;

·       short product life cycles; and

·       strong domestic and foreign competition.

If we are not able to compete successfully in this environment, our business will be materially harmed.

Many of our competitors have substantially greater financial, technical, manufacturing, marketing, sales, distribution, name recognition and other resources than we do. In addition, many of our competitors have well-established relationships with our current and potential customers and have extensive knowledge of system applications. In the past, we have lost potential customers to competitors for various reasons, including, but not limited to, re-programmability and lower price. Our current direct competitors include suppliers of complex programmable logic devices and field programmable gate arrays, such as Xilinx, Inc., Altera Corporation, Actel Corporation, and Lattice Semiconductor Corporation. Xilinx and Altera together have a majority share of the programmable logic market. Many system manufacturers may be unwilling or unable to switch to our products due to their familiarity with competitors’ products or other inhibiting factors.

We also face competition from companies that offer ASICs, which may be purchased for a lower price at higher volumes and typically have greater logic capacity, additional features and higher performance than those of our products. We may also face competition from suppliers of embedded microprocessors, such as Freescale Semiconductor, Inc., or from suppliers of products based on new or emerging technologies. Our inability to successfully compete in any of the following areas could materially harm our business:

·       the development of new products and advanced manufacturing technologies;

·       the quality, performance characteristics, price and availability of devices, programming hardware and software development tools;

·       the ability to engage with companies that provide synergistic products and services;

·       the incorporation of industry standards in our products;

·       the diversity of product offerings available to customers; or

·       the quality and cost effectiveness of design, development, manufacturing and marketing efforts.

We may be unable to successfully grow our business if we fail to compete effectively with others to attract and retain key personnel

We believe our future success will depend upon our ability to attract and retain engineers and other highly competent personnel. Our employees are at-will and not subject to employment contracts. Hiring and retaining qualified sales, technical and financial personnel is difficult due to the limited number of qualified professionals, economic conditions and the size of our company. Competition for these types of

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employees is intense. In addition, new hires frequently require extensive training before they achieve desired levels of productivity. We have in the past experienced difficulty in recruiting and retaining qualified senior management, sales, finance and technical personnel. Failure to attract, hire, train and retain personnel could materially harm our business.

We may be unable to adequately protect our intellectual property rights, and may face significant expenses as a result of future litigation

Protection of intellectual property rights is crucial to our business, since that is how we keep others from copying the innovations that are central to our existing and future products. From time to time, we receive letters alleging patent infringement or inviting us to license other parties’ patents. We evaluate these requests on a case-by-case basis. These situations may lead to litigation if we reject the offer to obtain the license.

We have in the past and are currently involved in litigation relating to alleged infringement by us of others’ patents or other intellectual property rights. This kind of litigation is expensive and consumes large amounts of management’s time and attention. Additionally, matters that we initially consider not material to our business could become costly. For example, we incurred substantial costs associated with the litigation and settlement of our dispute with Actel, which materially harmed our business. In addition, if the letters we sometimes receive alleging patent infringement or other similar matters result in litigation that we lose, a court could order us to pay substantial damages and/or royalties, and prohibit us from making, using, selling or importing essential technologies. For these and other reasons, this kind of litigation could materially harm our business.

Also, although we may seek to obtain a license under a third party’s intellectual property rights in order to bring an end to certain claims or actions asserted against us, we may not be able to obtain such a license on reasonable terms, or at all. We have entered into technology license agreements with third parties which give those parties the right to use patents and other technology developed by us, and which give us the right to use patents and other technology developed by them. We anticipate that we will continue to enter into these kinds of licensing arrangements in the future; however, it is possible that desirable licenses will not be available to us on commercially reasonable terms. If we lose existing licenses to key technology, or are unable to enter into new licenses that we deem important, it could materially harm our business.

Because it is critical to our success that we continue to prevent competitors from copying our innovations, we intend to continue to seek patent and trade secret protection for our products. The process of seeking patent protection can be long and expensive, and we cannot be certain that any currently pending or future applications will actually result in issued patents, or that, even if patents are issued, they will be of sufficient scope or strength to provide meaningful protection or any commercial advantage to us. Furthermore, others may develop technologies that are similar or superior to our technology or design around the patents we own. We also rely on trade secret protection for our technology, in part through confidentiality agreements with our employees, consultants and other third parties. However, these parties may breach these agreements, and we may not have adequate remedies for any breach. In any case, others may come to know about or determine our trade secrets through a variety of methods. In addition, the laws of certain territories in which we develop, manufacture or sell our products may not protect our intellectual property rights to the same extent as the laws of the United States.

We may engage in manufacturing, distribution or technology agreements that involve numerous risks, including the use of cash, diversion of resources and significant write-offs

We have entered into and, in the future, intend to enter into agreements that have involved numerous risks, including the use of significant amounts of our cash; diversion of resources from other development

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projects or market opportunities; our ability to incorporate licensed technology in our products; our ability to introduce related products in a cost-effective and timely manner; our ability to collect amounts due under these contracts; and market acceptance of related products. For instance, we have licensed certain microprocessor technology from MIPS Technologies and obtained other elements of our products from third-party companies. In the fourth quarter of 2004, we determined that the expected revenue and gross profit from these products would not be sufficient to recover the full carrying value of the related third party elements and other long-lived assets, and we recorded a $3.2 million long-lived asset impairment charge. If we fail to recover the cost of these or other assets from the cash flow generated by the related products, our assets will become impaired and our financial results would be harmed.

Our business is subject to the risks of earthquakes, other catastrophic events and business interruptions for which we may maintain limited insurance

Our operations and the operations of our suppliers are vulnerable to interruption by fire, earthquake, power loss, flood, terrorist acts and other catastrophic events beyond our control. In particular, our headquarters is located near earthquake fault lines in the San Francisco Bay area. In addition, we rely on sole suppliers to manufacture our products and would not be able to qualify an alternate supplier of our products for several quarters. Our suppliers often hold significant quantities of our inventory which, in the event of a disaster, could be destroyed. In addition, our business processes and systems are vulnerable to computer viruses, break-ins, and similar disruptions from unauthorized tampering. Any catastrophic event, such as an earthquake or other natural disaster, the failure of our computer systems, war or acts of terrorism, could significantly impair our ability to maintain our records, pay our suppliers, or design, manufacture or ship our products. The occurrence of any of these events could also affect our customers, distributors and suppliers and produce similar disruptive effects upon their business. If there is an earthquake or other catastrophic event near our headquarters, our customers’ facilities, our distributors’ facilities or our suppliers’ facilities, our business could be seriously harmed.

We do not have a detailed disaster recovery plan. In addition, we do not maintain sufficient business interruption and other insurance policies to compensate us for all losses that may occur. Any losses or damages incurred by us as a result of a catastrophic event or any other significant uninsured loss could have a material adverse effect on our business.

Our principal stockholders have significant voting power and may vote for actions that may not be in the best interests of our other stockholders

Our officers, directors and principal stockholders together control a significant portion of our outstanding common stock. As a result, these stockholders, if they act together, will be able to significantly influence our operations, affairs and all matters requiring stockholder approval, including the election of directors and approval of significant corporate transactions. This concentration of ownership may have the effect of delaying or preventing a change in control and might affect the market price of our common stock. This concentration of ownership may not be in the best interest of our other stockholders.

Our Shareholder Rights Plan, Certificate of Incorporation, Bylaws and Delaware law contain provisions that could discourage a takeover that is beneficial to stockholders

Our Shareholder Rights Plan as well as provisions of our Certificate of Incorporation, our Bylaws and Delaware law could make it difficult for a third party to acquire us, even if doing so would be beneficial to our stockholders.

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The market price of our common stock may fluctuate significantly and could lead to securities litigation

Stock prices for many companies in the technology and emerging growth sectors have experienced wide fluctuations that have often been unrelated to the operating performance of such companies. In the past, securities class action litigation has often been brought against a company following periods of volatility in the market price of its securities. In the future, we may be the target of similar litigation. Securities litigation could result in substantial costs and divert management’s attention and resources.

Changes to existing accounting pronouncements or taxation rules or practices may cause adverse revenue fluctuations, affect our reported results of operations or how we conduct our business

New accounting pronouncements or taxation rules and varying interpretations of accounting pronouncements or taxation practice have occurred and may occur in the future. Any future changes in accounting pronouncements or taxation rules or practices may have a significant effect on how we report our results and may even affect our reporting of transactions completed before the change is effective. This change to existing rules, future changes, if any, or the questioning of current practices may adversely affect our reported financial results or the way we conduct our business.

For example, FASB has issued Statement 123R, “Share-Based Payment,” which will require us to measure compensation costs for all stock based compensation (including our stock options and our employee stock purchase plan, as currently constructed) at fair value and record compensation expense equal to that value beginning in January 2006. If this accounting pronouncement had been in effect during the current period, we estimate that we would have reported a significantly lower net income.

Compliance with changing regulations related to corporate governance and public disclosure may result in additional expenses

Changing laws, regulations and standards relating to corporate governance and public disclosure, including the Sarbanes-Oxley Act of 2002, new SEC regulations and the Nasdaq National Market rules, are creating uncertainty for companies such as ours. These new or changed laws, regulations and standards are subject to varying interpretations in many cases due to their lack of specificity, and as a result, their application in practice may evolve over time as new guidance is provided by regulatory and governing bodies, which could result in continuing uncertainty regarding compliance matters and higher costs necessitated by ongoing revisions to disclosure and governance practices. We are committed to maintaining high standards of corporate governance and public disclosure. As a result, we intend to invest resources to comply with evolving laws, regulations and standards, and this investment may result in increased general and administrative expenses and a diversion of management time and attention from profit-generating activities. If our efforts to comply with new or changed laws, regulations and standards differ from the activities intended by regulatory or governing bodies due to ambiguities related to practice, our reputation may be harmed and the market price of our common stock could be affected.

While we believe that we currently have adequate internal control procedures in place, we are still exposed to potential risks from recent legislation requiring companies to evaluate controls under Section 404 of the Sarbanes-Oxley Act of 2002

As of December 2005, we have evaluated our internal control systems in order to allow management to report on, and our independent registered public accounting firm to attest to, our internal controls over financial reporting, as required by Section 404 of the Sarbanes-Oxley Act. We performed the system and process evaluation and testing required in an effort to comply with the management certification and independent registered public accounting firm attestation requirements of Section 404. As a result, we incurred additional expenses and a diversion of management’s time. While we believe that our internal control procedures are adequate and we intend to continue to fully comply with the requirements relating

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to internal control and all other aspects of Section 404, our controls necessary for continued compliance with the Act may not operate effectively at all times and may result in a material control disclosure. The identification of a material weakness in internal controls over financial reporting, if any, could indicate a lack of proper controls to generate accurate financial statements. Furthermore, we cannot be certain as to the outcome of future evaluations, testing and remediation actions or the impact of the same on our operations. If we are not able to remain in compliance with the requirements of Section 404, we might be subject to sanctions or investigation by regulatory authorities, such as the SEC or the Nasdaq National Market. Any such action could adversely affect our financial results and the market price of our common stock.

We have implemented import and export control procedures to comply with United States regulations but we are still exposed to potential risks from import and export activity

Our products, technology and software are subject to import and export control laws and regulations which, in some instances, may impose restrictions on business activities, or otherwise require licenses or other authorizations from agencies such as the U.S. Department of State, U.S. Department of Commerce and U.S. Department of the Treasury. We have import and export licensing and compliance procedures in place for purposes of conducting our business consistent with U.S. and applicable international laws and regulations, and we periodically review these procedures to maintain compliance with the requirements relating to import and export regulations. If we are not able to remain in compliance with import and export regulations, we might be subject to investigation, sanctions or penalties by regulatory authorities. Such penalties can include civil, criminal or administrative remedies (such as loss of export privileges). We cannot be certain as to the outcome of an evaluation, investigation, inquiry or other action or the impact of these items on our operations. Any such action could adversely affect our financial results and the market price of our common stock.

ITEM 1B.       UNRESOLVED STAFF COMMENTS

Not applicable.

ITEM 2.              PROPERTIES

Our principal administrative, sales, marketing, research and development and final testing facility is located in a building of approximately 42,600 square feet in Sunnyvale, California. This facility is leased through March 2009 with an option to renew. We have sub-let approximately 8,000 square feet of this facility through November 2007. Our research and development facility in Toronto, Canada, consisting of approximately 8,400 square feet, is leased through February 2010. We lease a 4,500 square foot facility in Bangalore, India for the purpose of software development. This facility is leased through November 2009. We also lease office space in Shanghai, Hong Kong and Beijing, China; Taipei, Taiwan; London, England; Munich, Germany; and Tokyo, Japan. We believe that our existing facilities are adequate for our current needs.

ITEM 3.                LEGAL PROCEEDINGS

On October 26, 2001, a putative securities class action was filed in the U.S. District Court for the Southern District of New York against certain investment banks that underwrote QuickLogic’s initial public offering, QuickLogic and some of QuickLogic’s officers and directors. The complaint alleges excessive and undisclosed commissions in connection with the allocation of shares of common stock in QuickLogic’s initial and secondary public offerings and artificially high prices through “tie-in” arrangements which required the underwriters’ customers to buy shares in the aftermarket at pre-determined prices in violation of the federal securities laws. Plaintiffs seek an unspecified amount of damages on behalf of persons who purchased QuickLogic’s stock pursuant to the registration statements

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between October 14, 1999 and December 6, 2000. Various plaintiffs have filed similar actions asserting virtually identical allegations against over 300 other public companies, their underwriters, and their officers and directors arising out of each company’s public offering. These actions, including the action against QuickLogic, have been coordinated for pretrial purposes and captioned In re Initial Public Offering Securities Litigation, 21 MC 92. A stipulation of settlement for the claims against the issuer defendants, including the Company, has been signed and was submitted to the court. Under the stipulation of settlement, the plaintiffs will dismiss and release all claims against participating defendants in exchange for a contingent payment guaranty by the insurance companies collectively responsible for insuring the issuers in all the related cases, and the assignment or surrender to the plaintiffs of certain claims the issuer defendants may have against the underwriters. Under the guaranty, the insurers will be required to pay the amount, if any, by which $1.0 billion exceeds the aggregate amount ultimately collected by the plaintiffs from the underwriter defendants in all the cases. On February 15, 2005, the court preliminarily approved the settlement contingent on specified modifications. The settlement is still subject to court approval and a number of other conditions. There is no guarantee that the settlement will become effective.

On July 3, 2003, a putative securities class action was filed in the U.S. District Court for the Southern District of New York by shareholders of Tower Semiconductor Ltd. against Tower, several of its directors, and several of its investors, including QuickLogic. QuickLogic was named solely as an alleged control person. On August 19, 2004, the court dismissed the claims against all defendants, including QuickLogic, with prejudice. On September 29, 2004, one of the plaintiffs filed a notice of appeal from the judgment.

ITEM 4.                SUBMISSION OF MATTERS TO A VOTE OF SECURITY HOLDERS

No matters were submitted to a vote of security holders during the fourth quarter of the fiscal year covered by this report.

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PART II

ITEM 5.                MARKET FOR THE REGISTRANT’S COMMON EQUITY, RELATED STOCKHOLDER MATTERS AND ISSUER PURCHASES OF EQUITY SECURITIES

Market Information

Our common stock has been traded on the Nasdaq National Market under the symbol “QUIK” since October 15, 1999, the date of our initial public offering. The following table sets forth, for the periods indicated, the high and low closing sales prices for our common stock, as reported on the Nasdaq National Market:

 

Stockholders

The closing price of our common stock on the Nasdaq National Market was $5.01 per share on February 28, 2006. As of February 28, 2006, there were 28,088,929 shares of common stock outstanding that were held of record by approximately 252 stockholders. The actual number of stockholders is greater than this number of holders of record since this number does not include stockholders whose shares are held in trust by other entities. We estimate that the number of beneficial stockholders of the shares of our common stock as of February 28, 2006 was approximately 6,200.

Dividend Policy

We have never declared or paid any dividends on our capital stock. We currently expect to retain future earnings, if any, for use in the operation and expansion of our business and do not anticipate paying any cash dividends in the foreseeable future.

Equity Compensation Plan Information

The information required by this item regarding equity compensation plans is incorporated by reference to the information set forth in Item 12 of this Annual Report on Form 10-K.

Shelf Registration

On July 12, 2005, we filed a shelf registration statement on Form S-3, which was declared effective on July 26, 2005 by the Securities and Exchange Commission. Under this filing, we have the ability to raise up to $30.0 million, in one or more transactions, by selling common stock, preferred stock, depositary shares and warrants. As of December 31, 2005, we had not raised any funds in connection with this filing.

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ITEM 6.              SELECTED FINANCIAL DATA

 

(1)          Long-lived asset impairment in 2004 consisted of a $3.2 million non-cash charge. Due to a reduction in expected product revenue, we wrote down the assets associated with our QuickMIPS products to their estimated fair market value.

(2)          Goodwill impairment in 2002 consisted of an $11.4 million non-cash charge. The charge completely wrote off the goodwill amount attributable to our asset acquisition of V3 Semiconductor, Inc.

(3)          Restructuring costs in 2002 of $783,000 resulted from a reduction in our worldwide headcount by approximately 25% and the closure of offices in La Palma, California and Richardson, Texas. Restructuring costs in 2001 of $619,000 resulted from a reduction in our worldwide headcount by approximately 20% and charges associated with the cancellation of a product.

(4)          Write-down of marketable securities consisted of a non-cash charge of $1.5 million, $1.5 million, $3.8 million and $6.8 million in the years ended December 31, 2005, 2004, 2002 and 2001, respectively, for the write-down of our equity investment in Tower Semiconductor Ltd. to market value.

(5)          Gain on sale of investment in Tower Semiconductor Ltd. in 2003 consisted of $719,000 from the sale of 412,825 available-for-sale Tower ordinary shares which generated total proceeds of approximately $2.1 million.

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ITEM 7.                MANAGEMENT’S DISCUSSION AND ANALYSIS OF FINANCIAL CONDITION AND RESULTS OF OPERATIONS

EXPLANATORY NOTE

The following Management’s Discussion and Analysis of Financial Condition and Results of Operations, as well as information contained in “Risk Factors” in Item 1A and elsewhere in this Annual Report on Form 10-K, contains “forward-looking statements” within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934. We intend that these forward-looking statements be subject to the safe harbors created by those provisions. Forward-looking statements are generally written in the future tense and/or are preceded by words such as “will,” “may,” “should,” “forecast,” “could,” “expect,” “suggest,” “believe,” “anticipate,” “intend,” “plan,” or other similar words. Forward-looking statements include statements regarding (1) our revenue levels, (2) our gross profit and factors that affect gross profit, (3) our level of operating expenses, (4) our research and development efforts, (5) our liquidity, (6) our partners and suppliers, and (7) the commercial success of our products.

The forward-looking statements contained in this Annual Report involve a number of risks and uncertainties, many of which are outside of our control. Factors that could cause actual results to differ materially from projected results include, but are not limited to, risks associated with (1) the expected decline in revenue from our pASIC1 and pASIC2 products, (2) the commercial and technical success of our new products such as PolarPro, Eclipse II and QuickPCI II, (3) limited visibility into demand for our products, including demand from significant customers or for new products, (4) our dependence upon single suppliers to fabricate and assemble a substantial portion of our products, (5) our relationship with and the manufacturing of our products by Tower Semiconductor Ltd., and (6) the liquidity required to support our future operating and capital requirements. Although we believe that the assumptions underlying the forward-looking statements contained in this Annual Report are reasonable, any of the assumptions could be inaccurate, and therefore there can be no assurance that such statements will be accurate. In light of the significant uncertainties inherent in the forward-looking statements included herein, the inclusion of such information should not be regarded as a representation by us or any other person that the results or conditions described in such statements or our objectives and plans will be achieved. Furthermore, past performance in operations and share price is not necessarily indicative of future performance. QuickLogic disclaims any intention or obligation to update or revise any forward-looking statements, whether as a result of new information, future events or otherwise.

Overview

We operate in a single industry segment where we design and sell field programmable gate arrays, or FPGAs, embedded standard products, or ESPs, associated software and programming hardware. Our FPGA and ESP devices are standard products that can be programmed to perform desired logic functions. We design these devices based on our proprietary ViaLink technology. We believe that the underlying attributes of our ViaLink technology, including low power consumption, high reliability, design security and design efficiency enable us to deliver differentiated silicon solutions to our customers.

Our objective is to become the market leader in providing the lowest-power programmable logic solutions. We believe that our products provide our customers with the lowest power consumption, highest design security, and highest reliability of full-featured FPGA programmable logic products. We believe these devices enable system manufacturers to meet their time-to-market, lower total power consumption and add features or performance to their embedded applications. Competitively, our products can offer significant power, performance, time-to-market, cost, and design security benefits when compared to traditional FPGAs; lower cost of ownership, time-to-market and increased system flexibility benefits when compared to the use of application specific integrated circuits, or ASICs; and increased system flexibility, product differentiation and design security benefits when compared to application specific standard products, or ASSPs. We believe that developing products around our ViaLink technology will continue to

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allow us to provide products that address the design flexibility, system power, performance, intellectual property security and price points demanded by our target markets.

In 1991, we introduced our first FPGAs based upon our ViaLink technology. Our Mature product family consists of our pASIC1, pASIC2 and pASIC3 products.

In September 1998, we introduced our first Embedded Standard Products, or ESPs, which are products that combine standard functions and programmable logic in a single device. These products provide engineers with the ease-of-use, guaranteed functionality, high performance, low non-recurring engineering charges and immediate availability of application specific standard products, or ASSPs, combined with the flexibility and time-to-market advantages of programmable logic. Our ESP product family includes QuickRAM, QuickPCI, and V3 products.

Our Advanced ESP product family includes Eclipse products, as well as our new Eclipse™ II, QuickPCI® II, PolarPro™ and QuickMIPS products.

Our new products target power sensitive and power critical applications where system designers want to minimize power consumption, add features to a system, improve the performance of a system and achieve a fast time-to-market.

In the fourth quarter of 2004, we completed the design of our Eclipse II and QuickPCI II product families and additions to our QuickMIPS products. We designed Eclipse II and QuickPCI II to provide a low-power solution for applications requiring medium to small amounts of programmable logic. Eclipse II and QuickPCI II devices are the lowest-power FPGA products available on the market today. These devices offer the lowest power consumption during all phases of operation—power-up, quiescent and dynamic operation.

Our PolarPro architecture and related products were announced in November 2005. These products improve on our Eclipse II and QuickPCI II low-power leadership by providing lower power consumption and a more cost-effective architecture. Our PolarPro architecture combines the industry’s lowest-power FPGA with embedded circuitry for implementing high-bandwidth bus-to-bus interfaces. All device circuitry is optimized for low power consumption through the new and innovative Very Low Power mode, or VLP, which provides an instant ability to lower power consumption when the device function is not needed. When put in VLP mode, we believe that our PolarPro products draw less than 10 micro amps of quiescent current. PolarPro products also exhibit the FPGA industry’s lowest dynamic power consumption, with operational power consumption up to three times lower than competing alternatives. Based on our engineering analysis of portable media players, we believe designers of handheld, battery-powered products using PolarPro products can now extend battery life by as much as four times as compared to a standard product implementation, setting a new standard for low power consumption through the use of FPGAs. Our first PolarPro product, the QL1P100, is currently being sampled and we expect it to be released for production by the second quarter of 2006. We expect to sample additional PolarPro products during 2006.

In addition to offering the lowest-power, full featured FPGAs, our products also provide high design security, small form factor, instant on and high reliability.

The low power consumption and high performance of our Eclipse II, QuickPCI II and PolarPro products is compelling in power critical and power sensitive applications such as handheld, battery powered, prosumer devices. This compelling advantage is allowing us to engage with new customers in the portable electronics markets, including manufacturers of portable GPS systems and personal video recorders. We compete in various markets, including: instrumentation and test; data communications and telecommunications; consumer; video, audio and graphics imaging; high-performance computing; and military and aerospace systems. Based on current customer design activity, we expect that consumer applications will represent a higher proportion of our revenue in the future.

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Our proprietary ViaLink programmable metal-to-metal technology is the core of our FPGA products and the foundation of our ESP products. Our ViaLink technology allows us to create devices smaller than competitors’ comparable products, thereby minimizing silicon area and cost. In addition, our ViaLink technology has lower electrical resistance and capacitance than other programmable technologies and, consequently, supports higher signal-speed and low power consumption. Our user-programmable platform facilitates full utilization of a device’s logic cells, clocks and input/output pins. These logic cells have been optimized to efficiently implement a wide range of logic functions at high speed, thereby enabling greater usable device density and design flexibility. Our architecture uses our ViaLink technology to maximize interconnects at every routing wire intersection, which allows more paths between logic cells. As a consequence, system designers are able to use our devices with smaller gate counts to implement their designs than if they had used competing FPGAs. The abundance of interconnect resources also provides a dense connection between the ASSP and the FPGA portions of Embedded Standard Products.

Our ViaLink technology also provides our products with what we believe to be “bulletproof” intellectual property security, especially compared to SRAM-based FPGA or ASIC solutions. We believe intellectual property security is important to system designers who choose to implement proprietary algorithms or features in programmable logic.

We believe that important industry trends in our target markets include lower power consumption, higher performance, shorter time-to-market, intellectual property security, higher ASIC development expenses and higher product development risks. We believe our products are designed to address these trends.

The market for programmable logic devices is expected to grow more quickly than the semiconductor industry, and we believe the FPGA programmable logic market will grow more quickly than the market for complex programmable logic devices, or CPLDs. One factor fueling this high growth is the migration from ASIC circuit designs to programmable logic circuit designs. System designers often choose programmable logic solutions over ASIC solutions, due to the relatively low development cost, low development risk, quick time-to-market and high adaptability or flexibility of programmable logic devices, and due to the ability of programmable logic suppliers to reduce the unit costs of their products over time.

Within the programmable logic device market, we believe that the market for low-power embedded applications will be a relatively high-growth market, as original equipment manufacturers, or OEMs, serving the consumer or professional portable markets accelerate the offering of devices such as portable, 3-D GPS products incorporating micro hard drive capability or personal video recorders incorporating Wi-Fi and a micro hard drive. This adoption of new features by embedded system designers is increasing the use of programmable logic, since embedded processors often do not have the native ability to interface to components such as Wi-Fi modules or micro hard disk drives, which were designed to work in a personal computer environment. Our Eclipse II, QuickPCI II and PolarPro products offer compelling advantages in these programmable interconnect applications, where customers benefit from their low power consumption, small form factor and high bandwidth.

In 2000, we entered into a Share Purchase Agreement, Foundry Agreement and other related agreements, as amended, with Tower. Under the terms of the agreements, we agreed to make a strategic investment of up to $25 million in Tower as part of Tower’s plan to build and equip a new wafer fabrication facility. The facility produces 200-mm wafers in geometries of 0.18 micron, using advanced complementary metal oxide semiconductor, or CMOS, technology acquired from Toshiba.

During 2001 and 2002, we paid Tower a total of $21.3 million to fulfill our investment requirements under the terms of the agreement. In partial consideration for the investment, we received 1,757,368 Tower ordinary shares with an original cost of $16.6 million. We wrote down the Tower shares due to an “other than temporary” decline in their market value by $1.5 million, $1.5 million, $3.8 million and $6.8

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million in fiscal 2005, 2004, 2002 and 2001, respectively. The cumulative effect of these write-downs is that the adjusted cost of our Tower ordinary shares is $1.17 per share or $1.6 million.

During fiscal 2003, we sold 412,825 of the available-for-sale Tower ordinary shares for total proceeds of approximately $2.1 million and recognized a gain in the amount of $719,000.

As of December 31, 2005, we held 1,344,543 available for sale Tower ordinary shares valued at $1.45 per share, the market value of these shares at the end of 2005. We intend to continue to hold 450,000 Tower ordinary shares in order to receive competitive product pricing and, accordingly, have classified these shares as a long-term investment on our balance sheets. The remaining 894,543 shares are recorded as a short-term investment on our balance sheets.

We also received $4.7 million in prepaid wafer credits in partial consideration for the investment, $4.2 million of which remained available as of December 31, 2005. The credits have no stated maturity and we have guaranteed capacity at Tower through at least 2010. These credits are recorded within long-term other assets on the balance sheets and can be applied toward wafer purchases from Tower at 15% of the value of future purchases.

We sell programmed and unprogrammed products through distributors and directly to system manufacturers. We recognize revenue at the time of shipment of products directly to system manufacturers. However, we sell the majority of our products through distributors who earn a negotiated margin on the sale of our products. We defer recognition of revenue from sales of unprogrammed products to distributors until after they have sold our products to systems manufacturers. We recognize revenue on programmed products at the time of shipment to our distributors. During 2005 and 2004, approximately 71% and 69%, respectively, of the units shipped to our distributors were programmed by us and, accordingly, are not returnable. The percentage of sales derived through distributors was 65%, 74% and 71% in 2005, 2004 and 2003, respectively. The percentage of sales derived through direct sales was 35%, 26% and 29% in 2005, 2004, and 2003, respectively.

Two distributors of our products accounted for 22% and 19% of revenue in 2005. Three distributors of our products accounted for 22%, 13% and 11% of revenue in 2004. Three distributors of our products accounted for 19%, 17% and 11% of revenue in 2003. One U.S.-based instrumentation and test customer, Honeywell, accounted for 13% of revenue in 2005, which included significant purchases of pASIC1 and pASIC2 products under our end-of-life program. One Chinese systems manufacturer, purchasing our products through a distributor, accounted for 14% percent of revenue in 2003. We anticipate that a limited number of distributors and customers will continue to account for a significant portion of our revenue and that individual distributors could account for a larger portion of our revenue.

Our international sales were 50%, 56% and 56% of revenue in 2005, 2004 and 2003, respectively. Revenue from sales to international customers is expected to continue to represent a significant portion of our revenue. All of our sales originate in the United States and are denominated in U.S. dollars.

We outsource the wafer manufacturing, assembly and test of all of our products. We currently rely upon Taiwan Semiconductor Manufacturing Company Ltd., or TSMC, Cypress Semiconductor Corporation, Tower, Kawasaki Microelectronics, Inc. and Samsung Semiconductor, Inc. to manufacture our products, and we rely primarily upon Amkor Technology, Inc. to assemble, test and program our products. Our wafer suppliers’ lead times are often as long as three months and sometimes longer. In addition, Tower requires us to provide them with a monthly wafer start forecast. Under the terms of our agreement with them, we are limited in the quantity that we can increase or decrease our wafer forecast and we are committed to take delivery of and pay for a minimum portion of the forecasted wafer volume. Our long manufacturing cycle times are at odds with our customers’ desire for short delivery lead times and, as a result, we typically purchase wafers based on our internal forecasts of customer demand.

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Critical Accounting Policies and Estimates

The methods, estimates and judgments we use in applying our most critical accounting policies have a significant impact on the results we report in our financial statements. The U.S. Securities and Exchange Commission, or SEC, has defined critical accounting policies as those that are most important to the portrayal of our financial condition and results of operations and require us to make our most difficult and subjective judgments, often as a result of the need to make estimates of matters that are inherently uncertain. Based on this definition, our critical policies include revenue recognition including sales returns and allowances, inventory valuation including identification of excess quantities and product obsolescence, allowance for doubtful accounts, valuation of investments, valuation of long-lived assets, accounting for income taxes, and estimating accrued liabilities. We believe that we apply judgments and estimates in a consistent manner and that such consistent application results in financial statements and accompanying notes that fairly represent all periods presented. However, any factual errors or errors in these judgments and estimates may have a material impact on our statement of operations and financial condition.

Revenue Recognition

We supply standard products which must be programmed before they can be used in an application. Our products may be programmed by us, distributors, end customers or third parties. Once programmed, our parts cannot be erased and, therefore, programmed parts are only useful to a specific customer.

We generally recognize revenue as products are shipped if evidence of an arrangement exists, delivery has occurred, the sales price is fixed or determinable, collection of the resulting receivable is reasonably assured, and product returns are reasonably estimable.

Revenue is recognized upon shipment to OEM customers, for both programmed and unprogrammed parts, provided that legal title and risk of ownership have transferred.

We also sell to distributors under agreements that allow for price adjustments and, in the case of unprogrammed parts, certain rights of return on unsold inventory.

Because programmed parts can only be used by a specific customer, it is our practice to agree upon any price adjustments with a distributor prior to shipment. Furthermore, distributors are not allowed any future price adjustments and have no rights of return on programmed parts. Accordingly, revenue is recognized upon delivery to a distributor since title and risk of ownership have transferred to the distributor, the price is fixed, no right of return exists, and collection of the resulting receivable is reasonably assured.

Unprogrammed parts shipped to distributors may be used by multiple end customers and distributors may have certain return and price adjustment privileges on unsold inventory. Accordingly, revenue of unprogrammed parts is deferred until resale to the end customer.

Software revenue from sales of design tools is recognized when persuasive evidence of an agreement exists, delivery of the software has occurred, no significant obligations with regard to implementation or integration remain, the fee is fixed or determinable and collection is reasonably assured. Software revenue amounted to less than one percent of our revenue for fiscal 2005, 2004 and 2003.

Inventory Valuation

We value our inventory at the lower of standard cost or net realizable value. Standard cost approximates actual cost on a first-in-first-out basis. Manufacturing overhead is included in product costs based on capacity. We routinely evaluate the value and quantities of our inventory in light of current market conditions and market trends. Our analysis may take into consideration historic usage, expected demand, anticipated sales price, new product development schedules, the effect new products might have on sales of existing products, product obsolescence, customer design activity, customer concentrations,

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product merchantability and other factors. Market conditions are subject to change and actual consumption of our inventory may differ from expected demand. During the introduction of a new product, we may begin production of products that have not been qualified and we may experience yields that are lower than anticipated. Such factors may be material to our financial statements. Historically, the lives of our products are unusually long and obsolescence has not been a significant factor in the valuation of our inventories. As a result of our evaluations, we have recorded reserves for quantities in excess of demand, cost in excess of market value, and product obsolescence.

We recorded charges against inventory of $406,000, $695,000 and $1.5 million in 2005, 2004 and 2003, respectively. These charges were recorded primarily due to quantities in excess of expected demand.

Estimating Allowance for Doubtful Accounts

We estimate uncollectible accounts receivable at each reporting period. In specific, we analyze the aging of accounts receivable and also bad debt history, payment history, customer concentration, customer credit-worthiness, and current economic trends when evaluating the adequacy of the allowance for doubtful accounts. Our accounts receivable balance was $5.6 million, net of the allowance for doubtful accounts of $1.0 million, as of December 31, 2005.

Valuation of Investments

At December 31, 2005, we held 1,344,543 available-for-sale Tower ordinary shares valued at approximately $2.0 million, of which approximately $1.3 million was recorded as a short-term investment. The market value of these shares was $1.45 per share at December 31, 2005. The available-for-sale securities are marked to market on our balance sheets at the end of each reporting period. These changes are also reflected in our consolidated statement of comprehensive income. If the market value of the available for sale shares changes during a reporting period, we record comprehensive gain or loss in the equity section of the balance sheets and we increase or decrease the value of the shares on our balance sheets. If the market value of the shares were to decline below the adjusted cost and if the decline is determined to be other than temporary, we would record a write-down of marketable securities as a charge to our statement of operations and reduce the adjusted cost of the shares.

During 2001, 2002, 2004 and 2005, we wrote down the value of our Tower shares due to declines in value that we determined to be “other than temporary.” This determination included factors such as market value and the period of time that the market value had been below the adjusted cost. The Tower shares purchased in 2001 were obtained at an average price of $12.84 per share. In 2001, we wrote down the cost of these shares by $6.8 million, or to $5.60 per share, based on the market price of Tower’s stock at that time. The Tower shares we purchased in 2002 were obtained at an average price of $5.46 per share. At December 31, 2002, all Tower shares held by us were written-down by $3.8 million, or to $3.40 per share, based on the market price of Tower’s stock at the end of our fiscal year. At December 31, 2004, all Tower shares held by us were written-down by $1.5 million, or to $2.26 per share, based on the market price of Tower’s stock at the end of our fiscal year. At June 30, 2005, all Tower shares held by us were written-down by $1.5 million, or to an adjusted cost of $1.17 per share, based on the market price of Tower’s stock at the end of our fiscal quarter.

As of December 31, 2005, we held 1,344,543 available for sale Tower ordinary shares with an unrealized gain of $377,000 recorded in accumulated other comprehensive income, representing the difference between the adjusted cost per share and $1.45 per share, their market value on the last trading day of the reporting period.

A 10% decline in the market value of the Tower shares would have approximately a $200,000 effect on the market value of the shares.

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Valuation of Long-lived Assets

We assess whether the value of identifiable intangibles and long-lived assets, including property and equipment and prepaid wafer credits, has been impaired annually and whenever events or changes in circumstances indicate that the carrying value of an asset or asset group may not be recoverable. Factors we consider important which could trigger an impairment review include the following:

·       significant under-performance relative to historical or projected future revenue and operating results;

·       significant changes in expected demand for the related products;

·       significant changes in the manner of our use of or the expected cash flow from the assets;

·       significant changes in the strategy for our overall business; and

·       significant negative economic events or trends affecting our business.

Our assessment of possible impairment is based on our ability to recover the carrying value of an asset or asset group from their expected future pre-tax cash flows, undiscounted and without interest charges, of the related operations. If these cash flows are less than the carrying value of the asset or asset group, we recognize an impairment loss for the difference between estimated fair value and carrying value, and the carrying value of the related assets is reduced by this difference. The measurement of impairment requires management to estimate future cash flows and the fair value of long-lived assets.

During the fourth quarter of 2004, we evaluated the revenue potential of our products based upon discussions with potential customers, consultations with external advisors, review of actual sales levels and analysis of current and future design opportunities. Based upon this evaluation, we determined that the future revenue outlook for our QuickMIPS products was lower than previously expected. Accordingly, we performed an impairment assessment on the long-lived assets associated with these products. Our preliminary assessment, based upon undiscounted cash flows, indicated that these assets were impaired. In order to determine the fair value of these assets, we performed a probability-weighted assessment of the revenue and related cash flows, discounted using a risk-free interest rate. Based upon this assessment, we recognized a $3.2 million long-lived asset impairment as an operating expense, which was allocated to the related long-lived assets on a pro rata basis using the carrying value of the assets immediately before the impairment charge. This $3.2 million charge reduced the net carrying value of our property and equipment by $2.0 million and our other long-term assets by $1.2 million. This write-down did not affect the carrying value of related inventory.

During 2005, 2004 and 2003, we wrote-off long-lived assets with a net book value of $66,000, $165,000 and $753,000, respectively, related to assets identified as having no future value to our operations.

Accounting for Income Taxes

As part of the process of preparing our financial statements, we are required to estimate our income taxes in each of the jurisdictions in which we operate. This process involves estimating our actual current tax exposure together with assessing temporary differences resulting from different tax and accounting treatment of items, such as deferred revenue, allowance for doubtful accounts, depreciation and amortization and employee related accruals. These differences result in deferred tax assets and liabilities, which are included on our balance sheets. We must then assess the likelihood that our deferred tax assets will be recovered from future taxable income and to the extent we believe that recovery is not likely, we must establish a valuation allowance. To the extent we establish a valuation allowance or increase this allowance in a period, we must include an expense within the tax provision in the statement of operations.

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Significant management judgment is required in determining our provision for income taxes, our deferred tax assets and liabilities and any valuation allowance recorded against our net deferred tax assets. Our deferred tax assets, consisting primarily of net operating loss carryforwards, amounted to $46 million as of December 31, 2005. We have also recorded a valuation allowance of $46 million as of December 31, 2005 due to uncertainties related to our ability to utilize our deferred tax assets before they expire. The valuation allowance is based on the uncertainty of our estimates of taxable income and the period over which our deferred tax assets will be recoverable. These carryforwards, if not utilized to offset future taxable income and income taxes payable, will expire beginning in 2006 for federal and state purposes.

Estimating Accrued Liabilities

We review our accounts payable and accrued liabilities at each reporting period, and accrue liabilities as appropriate. During this analysis we consider items such as manufacturing activity, commitments made to or the level of activity with vendors, payroll and employee-related costs, historic spending, budgeted spending, and anticipated changes in the cost of services.

Results of Operations

The following table sets forth the percentage of revenue for certain items in our statements of operations for the periods indicated:

 

Comparison of Fiscal Years Ended December 31, 2005 and 2004

Revenue.   Our revenue for 2005 and 2004 was $48.3 million and $44.6 million, respectively, representing a growth of $3.6 million or 8.2% from 2004 to 2005. The revenue increase was due to a $3.4 million increase in our Mature product family revenue, primarily related to end-of-life purchases of our pASIC1 products and higher customer demand, and a $1.3 million increase in Advanced ESP product family revenue, due to a $2.0 million increase in sales of our new Eclipse II, QuickPCI II and QuickMIPS products, partially offset by a decline in Eclipse sales from a Japanese customer purchasing through a distributor. These increases in revenue were partially offset by a $1.1 million decline in our ESP product family revenue, primarily due to changes in customer demand. Our combined ESP and Advanced ESP products contributed 37.9% and 40.6% of our revenue in 2005 and 2004, respectively.

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Our foundry agreement with the supplier that fabricates our pASIC1 and pASIC2 products expired at the end of 2005. We previously announced an end-of-life for these products and asked our customers to take delivery of lifetime buy orders before the end of 2005. These products contributed $21.1 million and $17.9 million of our revenue in 2005 and 2004, respectively. We currently believe that a majority of our customers that use pASIC1 and pASIC2 products have purchased enough product to satisfy their demand throughout the expected life of their products. While we have limited production capacity for these products beyond 2005, we experienced a significant reduction in pASIC1 and pASIC2 revenue near the end of 2005. Further, we believe pASIC1 and pASIC2 products will contribute less than 10% of our revenue by the second quarter of 2006 and we expect that these products will contribute no revenue in the third quarter of 2006.

In order to maintain or grow our revenue from its current level after the end-of-life period for our pASIC1 and pASIC2 products, we are dependent upon increased revenue from our existing products, especially our Eclipse II and QuickPCI II products, and the development of additional new products such as PolarPro.

We continue to seek to expand our revenue, including the pursuit of high volume sales opportunities in the consumer market segment, by providing low-power solutions incorporating industry standards such as PCI or IDE. Our industry is characterized by intense price competition and by lower prices as order volumes increase. While winning large volume sales opportunities will increase our revenue, we believe these opportunities may decrease our average selling price and gross profit as a percentage of revenue.

Gross Profit.   Gross profit was $30.1 million and $23.7 million in 2005 and 2004, respectively, which was 62.4% and 53.2% of revenue for those periods. The $6.4 million improvement in gross profit in 2005 was primarily due to: higher revenue and better product mix, which contributed approximately $3.7 million of this improvement; production variances improved by approximately $1.0 million, as our 2004 costs included significant yield variances associated with the initial production of our new products at Tower; lower inventory reserves and adverse purchase commitments of $870,000 which was due primarily to one-time charges totaling $790,000 in 2004 related to wafers of one product not expected to yield usable die; and lower unabsorbed overhead of approximately $840,000 which was due primarily to lower depreciation and amortization expense of $880,000. Our lower depreciation and amortization expense was largely a result of the impairment of long-lived assets recorded in the fourth quarter of 2004. The sale of previously reserved inventory reduced our cost of revenue by $1.0 million and $1.1 million in 2005 and 2004, respectively.

Research and Development Expense.   Research and development expense was $9.6 million and $11.9 million in 2005 and 2004, respectively, which represented 20.0% and 26.6% of revenue for those periods. The decrease of approximately $2.2 million in 2005 was primarily due to $2.0 million of lower charges for pre-production material and other expenses associated with the development of our new products and $730,000 of lower depreciation expense, partially offset by higher consulting expenses of $290,000 for the design our next generation products. During 2004, new product expenses were primarily associated with our Eclipse II, QuickPCI II and QuickMIPS products. During 2005, these expenses were primarily associated with PolarPro and other new products. We believe that continued or increased investments in product development and process technology are essential for us to remain competitive in the markets we serve. We expect that these development efforts will allow us to expand our product offering and provide additional value to our customers and stockholders.

Selling, General and Administrative Expense.   Selling, general and administrative, or SG&A, expense was $16.9 million and $15.9 million in 2005 and 2004, respectively, which represented 34.9% and 35.7% of revenue for those periods. SG&A expense increased on a dollar basis in 2005 as compared to 2004 while declining as a percentage of revenue due to the proportionately greater increase in revenue during 2005. The $950,000 annual increase in SG&A expense was primarily the result of: higher salaries and personnel

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costs of $600,000; higher legal expenses of $180,000 due to collection efforts, compliance activities and the filing of a shelf registration statement on Form S-3 with the Securities and Exchange Commission; higher commissions to independent sales representatives of $180,000 due to higher revenue amounts, and board of director fees of $140,000.

Long-lived Asset Impairment Charge.   During the fourth quarter of 2004, we evaluated the revenue potential of our products based upon discussions with potential customers, consultations with external advisors, review of actual sales levels and analysis of current and future design opportunities. Based upon this evaluation, we determined that the future revenue outlook for our QuickMIPS products was lower than previously expected. Accordingly, we performed an impairment assessment on the long-lived assets associated with these products. Our preliminary assessment, based upon undiscounted cash flows, indicated that these assets were impaired. In order to determine the fair value of these assets, we performed a probability-weighted assessment of the revenue and related cash flows, discounted using a risk-free interest rate. Based upon this assessment, we recognized a $3.2 million long-lived asset impairment as an operating expense, which was allocated to the related long-lived assets on a pro rata basis using the carrying value of the assets immediately before the impairment charge. This $3.2 million charge reduced the net carrying value of our property and equipment by $2.0 million and our other long-term assets by $1.2 million. This write-down did not affect the carrying value of related inventory.

Write-down of Marketable Securities.   In the second quarter of 2005 and the fourth quarter of 2004, we determined that our investment in Tower stock had suffered a decline in value that was determined to be “other than temporary” and recorded impairment charges of $1.5 million and $1.5 million, respectively. The impairment charges were recorded for the difference between our adjusted cost and the quoted market price of the stock on the last trading day of the reporting period. As a result of these write-downs, the adjusted cost of our Tower ordinary shares was $1.6 million, or $1.17 per share, as of December 31, 2005. The market value of our investment in Tower stock as of December 31, 2005 was $2.0 million, or $1.45 per share, based on the quoted market price of the stock on the last trading day of the fiscal year. The $377,000 difference between the adjusted cost and the market value was recorded as accumulated other comprehensive income on the balance sheets at December 31, 2005.

Interest Expense.   Interest expense declined to $189,000 in 2005 as compared to $255,000 in 2004. This $66,000 decrease was primarily due to lower average outstanding debt balances.

Interest Income and Other, Net.   Interest income and other, net, consists primarily of interest income on invested cash, foreign exchange gains and losses, and other tax expense. Interest income and other, net, increased to income of $542,000 in 2005 as compared to income of $212,000 in 2004. The $330,000 increase in interest income and other, net is primarily due to increased interest income received as a result of higher invested cash balances and higher interest rates, partially offset by foreign exchange rate losses.

Provision for Income Taxes.   We recorded a provision for income taxes of $169,000 in 2005, which consisted primarily of income taxes on foreign operations. No provision for income taxes was recorded in 2004 due to our pretax losses. Our ability to utilize our income tax loss carryforwards in future periods is uncertain and, accordingly, we recorded a full valuation allowance against the related tax benefit. We will continue to assess the realizability of the deferred tax assets in future periods.

As of December 31, 2005, we had net operating loss carryforwards for federal and state tax purposes of approximately $72.0 million and $18.3 million, respectively. These carryforwards, if not utilized to offset future taxable income and income taxes payable, will expire beginning in 2006 for federal and state purposes.

We recorded net income of $2.4 million in 2005 as compared to a net loss of $8.8 million in 2004. This $11.2 million improvement is primarily due to five factors: higher revenue of $3.6 million; higher gross profit of $6.4 million due to the revenue increase and due to a 9% improvement in gross margin as a

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percent of revenue; a $1.3 million reduction in operating expenses attributable to research and development and selling, general and administrative expenses; the absence of 2005 charges for long-lived asset impairment, which accounted for $3.2 million of 2004 operating expenses; and interest and other income, net, which improved by $330,000 as compared to 2004.

Comparison of Fiscal Years Ended December 31, 2004 and 2003

Revenue.   Our revenue for 2004 and 2003 was $44.6 million and $42.0 million, respectively, representing a growth of $2.6 million or 6.3% from 2003 to 2004. The revenue increase was primarily due to increased sales volume of our pASIC2, pASIC1, Eclipse and pASIC3 products, which increased by $2.7 million, $2.2 million, $1.2 million, and $860,000, respectively. The increase in our pASIC1 and pASIC2 product revenue was due to increased customer demand and end-of-life purchases. These increases in revenue were partially offset by a $3.8 million decline in sales of our QuickRAM products, which benefited in 2003 from sales to one customer in China. This customer, purchasing products through a distributor, accounted for 3% of our revenue in 2004 as compared to 14% of revenue in 2003. Our combined ESP and Advanced ESP products contributed 40.6% and 50.5% of our revenue in 2004 and 2003, respectively.

Our foundry agreement with the supplier that fabricates our pASIC1 and pASIC2 products expired at the end of 2005. We previously announced an end-of-life for these products and have asked our customers to take delivery of lifetime buy orders before the end of 2005. These product families contributed $17.9 million and $13.1 million of our revenue in 2004 and 2003, respectively.

Gross Profit.   Gross profit was $23.7 million and $20.9 million in 2004 and 2003, respectively, which was 53.2% and 49.9% of revenue for those periods. The $2.8 million improvement in gross profit in 2004 was primarily due to changes in product mix and lower product costs which contributed to improved gross profit by approximately $2.9 million, higher revenue which contributed to improved gross profit by approximately $1.6 million, and lower additions to the excess and obsolete inventory reserve of $940,000. This was partially offset by higher unfavorable yield and other manufacturing variances of $770,000 primarily due to initial production of our new products, one-time charges totaling $790,000 related to wafers of one product not expected to yield usable die, and higher unabsorbed overhead of $650,000. In 2004 and 2003, charges to inventory reserves were $700,000 and $1.5 million, respectively. The sale of previously reserved inventory reduced our cost of sales by $1.1 million and $1.5 million in 2004 and 2003, respectively.

Research and Development Expense.   Research and development expense was $11.9 million and $10.5 million in 2004 and 2003, respectively, which represented 26.6% and 25.0% of revenue for those periods. The increase of approximately $1.4 million in 2004 was primarily due to an increase of $980,000 in outside services and an increase of $340,000 for equipment and supplies, which were incurred primarily to bring our new Eclipse II and QuickMIPS products to production in 2004. In 2004 and 2003, research and development expense included $110,000 and $470,000 for the write-off of long-lived assets, respectively, primarily related to design software that is no longer in use. Other research and development expenses increased by approximately $340,000 during 2004.

Selling, General and Administrative Expense.   Selling, general and administrative expense was $15.9 million and $15.8 million in 2004 and 2003, respectively, which represented 35.7% and 37.6% of revenue for those periods. SG&A expense remained relatively unchanged on a dollar basis in 2004 as compared to 2003 while declining as a percentage of revenue due to the proportionately greater increase in revenue during 2004. The $140,000 increase in SG&A expense in 2004 as compared to 2003 was primarily the result of a $1.0 million increase in consulting and auditing expenses related to Sarbanes-Oxley compliance matters and a computer software upgrade, partially offset by a decrease of $370,000 in

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additions to our allowance for doubtful accounts, a decrease of $360,000 in depreciation expense and a decrease of $150,000 in salary-related expenses.

Long-lived Asset Impairment Charge.   During the fourth quarter of 2004, we evaluated the revenue potential of our products based upon discussions with potential customers, consultations with external advisors, review of actual sales levels and analysis of current and future design opportunities. Based upon this evaluation, we determined that the future revenue outlook for the QuickMIPS products was lower than previously expected. Accordingly, we performed an impairment assessment on the long-lived assets associated with these products. Our preliminary assessment, based upon undiscounted cash flows, indicated that these assets were impaired. In order to determine the fair value of these assets, we performed a probability-weighted assessment of the revenue and related cash flows, discounted using a risk-free interest rate. Based upon this assessment, we recognized a $3.2 million long-lived asset impairment as an operating expense, which was allocated to the related long-lived assets on a pro rata basis using the carrying value of the assets immediately before the impairment charge. This $3.2 million charge reduced the net carrying value of our property and equipment by $2.0 million and our other long-term assets by $1.2 million. This write-down did not affect the carrying value of related inventory.

Deferred Compensation.   As a result of granting stock options to employees prior to our initial public offering at below-market value, we recorded aggregate deferred compensation of $908,000 in 1999. No deferred compensation has been recorded as a result of stock option grants to employees since 1999. Deferred compensation is presented as a reduction of stockholders’ equity and amortized ratably over the vesting period of the applicable options, generally four years. We amortized $145,000 in 2003 and as of December 31, 2003 we had fully amortized these expenses. The amortization of deferred compensation is recorded as research and development and SG&A expenses, depending on the related employees’ activities.

Write-down of Marketable Securities.   During 2004, we determined that our investment in Tower stock had suffered a decline in value that was determined to be “other than temporary.” This determination included factors such as market value and the period of time that the market value had been below the adjusted cost. Accordingly, we recorded an impairment charge of $1.5 million in the fourth quarter of 2004 based on the quoted market price of the stock on the last day of the reporting period. As a result of this write-down, the adjusted cost of our Tower ordinary shares was $2.26 per share at the end of fiscal 2004, compared to $3.40 per share at the end of fiscal 2003. Unrealized income on available-for-sale Tower ordinary shares included within stockholders’ equity was $1.1 million at December 31, 2003.

Gain on Sale of Investment in Tower Semiconductor Ltd.   In 2003, we sold 412,825 available-for-sale Tower ordinary shares for total proceeds of approximately $2.1 million and recognized a gain in the amount of $719,000.

Interest Expense.   Interest expense was $255,000 in 2004 as compared to $178,000 in 2003. This increase was primarily due to higher interest rates.

Interest Income and Other, Net.   Interest income and other, net, includes interest income on invested cash, foreign exchange gains and losses, and other tax expense. Interest income and other, net, was income of $212,000 in 2004 as compared to income of $61,000 in 2003. The $151,000 improvement in interest income and other, net is primarily due to increased interest received as a result of higher invested average cash balances and higher interest rates.

Provision for Income Taxes.   In 2004 and 2003, we incurred tax losses. However, our ability to utilize these losses in future periods is uncertain and, accordingly, we recorded a full valuation allowance against the related tax benefit. As such, no provision for federal or state income taxes was recorded for 2004 and 2003.

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Our net loss increased to $8.8 million in 2004 from $4.7 million in 2003. This $4.1 million increase is primarily attributable to charges for long-lived asset impairment of $3.2 million and the write-down of marketable securities of $1.5 million that we did not incur in 2003. During 2003, we recorded $719,000 of gains on the sale of Tower shares. During 2004, our $2.6 million increase in revenue and $2.8 million improvement in gross profit were partially offset by an increase of $1.5 million in combined research and development and SG&A expenses.

Liquidity and Capital Resources

We have financed our operating losses and capital investments through sales of common stock, private equity investments, capital and operating leases, bank lines of credit and cash flow from operations. As of December 31, 2005, our principal sources of liquidity consisted of our cash and cash equivalents of $28.3 million, available credit under our revolving line of credit with Silicon Valley Bank of approximately $5.8 million, available credit under our equipment line of credit of approximately $3.0 million, and our investment in Tower with a market value of approximately $2.0 million.

As of December 31, 2005, our interest-bearing debt consisted of $1.4 million outstanding from Silicon Valley Bank and $1.5 million outstanding under a capital lease to acquire electronic design automation software and related maintenance. As of December 31, 2005, our accumulated deficit was $117.3 million. Capital expenditures, which are largely driven by the development of new products and manufacturing levels, could be up to $4.0 million in the next twelve months.

In June 2005, we modified our Amended and Restated Loan and Security Agreement with Silicon Valley Bank. Terms of the modified agreement include an $8.0 million revolving line of credit available through June 2006 and an additional $3.0 million of borrowing capacity under an equipment financing line of credit that is available to be drawn against through June 2006. The revolving line of credit provides for formula advances based upon a percentage of eligible accounts receivable and for non-formula advances not to exceed $4.0 million. As of December 31, 2005, we had no balances outstanding under the revolving line of credit and had available formula and non-formula advances totaling $5.8 million. As of December 31, 2005, we had $1.4 million outstanding under previous equipment lines of credit and $3.0 million available to be drawn against future equipment purchases. Advances under the new equipment line of credit must be repaid in either 30 or 36 equal monthly installments, depending upon the nature of the items financed. The bank has a first priority security interest on substantially all of our tangible and intangible assets to secure any outstanding amounts under the modified agreement. Under the terms of the modified agreement, we must maintain a minimum tangible net worth and an adjusted quick ratio. The modified agreement also has certain restrictions including, among others, the incurrence of other indebtedness, the maintenance of depository accounts, the disposition of assets, mergers, acquisitions, the granting of liens and the payment of dividends. We were in compliance with all loan covenants as of December 31, 2005.

As of December 31, 2005, we also had $1.5 million outstanding under a capital lease obligation to finance electronic design automation software and related maintenance. The capital lease obligation has an imputed interest rate of 8.5% per annum and is being repaid in quarterly amounts of $204,000 through November 2007.

Net Cash from Operating Activities

In 2005 and 2004, net cash provided by operating activities was $5.7 million and $410,000, respectively. The 2005 cash provided by operating activities resulted from net income of $2.4 million, adjusted for non-cash charges including depreciation and amortization of $2.6 million, a $1.5 million write-down of marketable securities related to the decline in market value of our Tower shares, and reserves for excess and obsolete inventory in the amount of $406,000. In addition, changes in working capital accounts used

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cash of $1.5 million as a result of increased inventory of $1.5 million due to the purchase of new product die and an increase in work-in-process inventory to fulfill customer demand, a decrease in accounts payable of $781,000 due to the timing of expenditures and inventory purchases at the at the end of each period and a $770,000 increase in accounts receivable due to a higher proportion of OEM shipments during the last quarter of 2005. These cash uses were partially offset by cash provided by higher accrued liabilities of $923,000 due primarily to employee related accruals, lower other assets of $376,000 due primarily to lower prepaid maintenance and insurance expenses, and higher deferred income and royalty revenue of $211,000.

In 2004, net cash provided by operating activities was $410,000 and resulted from a net loss of $8.8 million, adjusted for non-cash charges including depreciation and amortization of $4.3 million, $3.4 million of charges to cost of sales and operating expenses against long-lived assets related primarily to the long-lived asset impairment associated with our QuickMIPS products, a $1.5 million write-down of marketable securities related to the decline in market value of our Tower shares, and reserves for excess and obsolete inventory in the amount of $695,000. In addition, changes in working capital accounts used cash of $870,000 primarily as a result of increased inventories of $2.2 million due to higher sales levels, build-up of inventory in anticipation of pASIC1 and pASIC2 end-of-life purchases and the introduction of new products and a $862,000 increase in accounts receivable due to the timing of shipments within the last quarter of each year. These cash uses were partially offset by higher accounts payable, accrued liabilities, deferred income and other obligations of $1.7 million due to higher manufacturing volumes and inventory levels and lower other assets of $505,000 due primarily to lower prepaid expenses.

In 2003, net cash provided by operating activities was $4.8 million and resulted from a net loss of $4.7 million, adjusted for non-cash charges and other items including depreciation and amortization of $4.3 million, reserves for excess inventory in the amount of $1.5 million, $753,000 for the write-off of long-lived assets related to specific products that are not expected to achieve volume production and software that is no longer used in the development of our products, gains on the sale of Tower shares of $719,000 and amortization of deferred compensation costs of $145,000. In addition, changes in working capital accounts provided cash of $3.6 million primarily as a result of lower inventories of $1.2 million due to higher sales levels and a reduction in the number of weeks of inventory on hand for several products, lower other assets of $1.2 million due primarily to lower prepaid expenses and the termination of our deferred compensation plan, lower accounts receivable of $1.0 million due to improved collection efforts, higher accounts payable of $542,000 due to higher manufacturing volumes and higher deferred income and royalty revenue of $255,000. These sources of operating cash were partially offset by a decrease of $613,000 in accrued liabilities primarily due to the termination of the deferred compensation plan.

Net Cash from Investing Activities

In 2005 and 2004, net cash used for investing activities was $1.8 million and $1.3 million, respectively, and resulted from capital expenditures that were primarily for software and equipment to develop and produce our new products.

In 2003, net cash provided by investing activities was $125,000. We received $2.1 million from the sale of 412,825 Tower shares and spent $2.0 million for capital expenditures. The capital expenditures were primarily for software and equipment to develop and produce our new products.

Net Cash from Financing Activities

In 2005, net cash used for financing activities was $535,000. The primary use of these funds was to reduce our long-term and revolving debt, net of new borrowings, by $3.9 million. This was partially offset by $3.3 million of proceeds from the issuance of common shares under our employee stock purchase program and upon the exercise of stock options by employees.

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In 2004, net cash used for financing activities was $616,000. The primary use of these funds was to reduce our long-term and revolving debt, net of new borrowings, by $2.9 million. This was partially offset by $2.3 million of proceeds from the issuance of common shares under our employee stock purchase program and upon the exercise of stock options by employees.

In 2003, net cash provided by financing activities was $8.5 million. The primary source of these funds was the reclassification of $9.0 million of restricted cash to cash and cash equivalents based upon the terms of an amended and restated Silicon Valley Bank credit facility. In addition, we received $2.4 million from the issuance of common shares under our employee stock purchase program and upon the exercise of stock options by employees, and we used $2.9 million to reduce our long-term and revolving debt, net of new borrowings.

We require substantial working capital to fund our business, particularly to finance our operations, the acquisition of property and equipment, working capital and the repayment of debt. Our future liquidity will depend on many factors such as these, as well as our level of revenue and gross profit, market acceptance of our existing and new products, the expected decline in revenue from our pASIC1 and pASIC2 products, wafer purchase commitments, the amount and timing of research and development expenditures, the timing of new product introductions, production volumes, the quality of our products, sales and marketing efforts, our ability to obtain debt financing and to remain in compliance with the terms of our credit facilities, our ability to raise funds from the sale of Tower shares and equity in the Company, the exercise of employee stock options and participation in our employee stock purchase plan, and other factors related to the uncertainties of the industry and global economics. However, we believe that our existing cash resources will be sufficient to fund any operating losses, capital expenditures of up to $4.0 million, and provide adequate working capital for the next twelve months. As our liquidity is affected by many factors as mentioned above and as discussed in our “Risk Factors,” there can be no assurance that we will not seek additional capital during the next twelve months or that such capital will be available on terms acceptable to us. After the next twelve months, our capital and operating requirements will depend on many factors, including our level of revenue and gross profit, the market acceptance of our new products, the levels at which we maintain inventory and accounts receivable, costs of securing access to adequate manufacturing capacity, new product development efforts, capital expenditures and the level of our operating expenses.

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Contractual Obligations and Commercial Commitments

The following table summarizes our contractual obligations and commercial commitments as of December 31, 2005 and the effect such obligations and commitments are expected to have on our liquidity and cash flows in future periods (in thousands):

(1)          Certain of our wafer manufacturers require us to forecast wafer starts several months in advance. We are committed to take delivery of and pay for a portion of forecasted wafer volume. Wafer purchase commitments of $2.7 million include both firm purchase commitments and a portion of our forecasted wafer starts as of December 31, 2005.

(2)          Other commercial commitments are included as liabilities on our balance sheets as of December 31, 2005.

Inflation

The impact of inflation on our business has not been material for the periods presented.

Off-Balance Sheet Arrangements

We do not maintain any off-balance sheet partnerships, arrangements or other relationships with unconsolidated entities or others, often referred to as structured finance or special purpose entities, which are established for the purpose of facilitating off-balance sheet arrangements or other contractually narrow or limited purposes.

Recently Issued Accounting Pronouncements

On December 16, 2004, the Financial Accounting Standards Board, or FASB, issued Statement of Financial Accounting Standards, or SFAS, No. 123(R), “Share-Based Payment,” which is a revision of SFAS No. 123 and supersedes Accounting Principals Board, or APB, Opinion No. 25. SFAS No. 123(R) requires any share-based payments, or SBPs, to employees, including grants of employee stock options, to be valued at fair value on the date of grant, and to be expensed over the applicable vesting period. Pro forma disclosure of the income statement effects of share-based payments is no longer an alternative. SFAS No. 123(R), as amended, is effective for all stock-based awards granted in fiscal years beginning after June 15, 2005. In addition, companies must also recognize compensation expense related to any awards that are not fully vested as of the effective date. Compensation expense for the unvested awards will be measured based on the fair value of the awards previously calculated in developing the pro forma disclosures in accordance with the provisions of SFAS No. 123. See Notes 2 and 9 to our

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consolidated financial statements for information related to the pro forma effects on our reported net income (loss) and net income (loss) per share of applying the fair value recognition provisions of the previous SFAS No. 123, “Accounting for Stock-Based Compensation,” to stock-based employee compensation. We are currently assessing the impact of adopting SFAS No. 123(R) and related FASB Staff Positions (“FSPs”) and expect the impact upon adoption in fiscal year 2006 to be significant to our results of operations.

On March 29, 2005, the SEC issued Staff Accounting Bulletin (“SAB”) No. 107, which provides guidance on the interaction between SFAS No. 123(R), “Shared-Based Payment,” and certain SEC rules and regulations. SAB No. 107 provides guidance that may simplify some of the SFAS No. 123(R) implementation challenges and enhances the information that investors receive. We will apply the principles of SAB No. 107 in conjunction with the adoption of SFAS No. 123(R).

In May 2005, as part of a broader attempt to eliminate differences between the International Accounting Standards Board and generally accepted accounting principles in the United States, FASB issued SFAS No. 154, “Accounting Changes and Error Corrections,” which replaces APB Opinion No. 20, “Accounting Changes,” and FASB SFAS No. 3, “Reporting Accounting Changes in Interim Financial Statements.” APB 20 had required that changes in accounting principles be recognized by including the cumulative effect of the change in the period in which the new accounting principle was adopted. SFAS No. 154 requires retrospective application of the change to prior periods’ financial statements, unless it is impracticable to determine the period-specific effects of the change. The Statement is effective for fiscal years beginning after December 15, 2005. The adoption of this statement is not expected to have a material effect on our financial statements.

In September 2005, the FASB issued EITF Issue No. 04-13, “Accounting for Purchases and Sales of Inventory with the Same Counterparty” (“EITF 04-13”). The issue provided guidance on the circumstances under which two or more inventory transactions with the same counterparty should be viewed as a single nonmonetary transaction within the scope of APB Opinion No. 29, “Accounting for Nonmonetary Transactions.” The issue also provided guidance on circumstances under which nonmonetary exchanges of inventory within the same line of business should be recognized at fair value. EITF 04-13 will be effective for transactions completed in reporting periods beginning after March 15, 2006. We are evaluating the impact that this issue will have on our consolidated financial statements.

In November 2005, the FASB issued FSP FAS 115-1 and FAS 124-1, “The Meaning of Other-Than-Temporary Impairment and Its Application to Certain Investments” (“FSP 115-1 and 124-1”), which clarifies when an investment is considered impaired, whether the impairment is other than temporary, and the measurement of an impairment loss. It also includes accounting considerations subsequent to the recognition of an other-than-temporary impairment and requires certain disclosures about unrealized losses that have not been recognized as other-than-temporary impairments. FSP 115-1 and 124-1 are effective for all reporting periods beginning after December 15, 2005. At December 31, 2005, we had no unrealized investment losses that had not been recognized as other-than-temporary impairments in our available-for-sale securities. We do not anticipate that the implementation of these statements will have a significant impact on our financial position or results of operations.

ITEM 7A.  QUANTITATIVE AND QUALITATIVE DISCLOSURES ABOUT MARKET RISK

Interest Rate Risk

Our exposure to market rate risk for changes in interest rates relates primarily to our investment portfolio and variable rate debt. We do not use derivative financial instruments to manage our interest rate risk. We are adverse to principal loss and ensure the safety and preservation of invested funds by limiting default, market and reinvestment risk. Our investment portfolio is generally comprised of investments that meet high credit quality standards. Since these securities are subject to interest rate risk, they could decline

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in value if interest rates fluctuate. Due to the short duration and conservative nature of our investment portfolio, we do not anticipate any material loss with respect to our investment portfolio. A 10% move in interest rates as of December 31, 2005 would have an immaterial effect on our financial position, results of operations and cash flows.

Foreign Currency Exchange Rate Risk

All of our sales and cost of manufacturing are transacted in U.S. dollars. We conducted a portion of our research and development activities in Canada and India and have sales and marketing offices in several locations outside of the United States. We use the U.S. dollar as our functional currency. Most of the costs incurred at these international locations are in local currency. If these local currencies strengthen against the U.S. dollar, our payroll and other local expenses will be higher than we currently anticipate. Since our sales are transacted in U.S. dollars, this negative impact on expenses would not be offset by any positive effect on revenue. Operating expenses denominated in foreign currencies were approximately 25%, 23% and 22% of total operating expenses in 2005, 2004 and 2003, respectively. A majority of these foreign expenses were incurred in Canada. A currency exchange rate fluctuation of 10% would have caused our operating expenses to change by approximately $730,000 in the year ended December 31, 2005.

Equity Price Risk

Our exposure to equity price risk for changes in market value relates primarily to our investment in Tower Semiconductor Ltd., or Tower. Tower’s ordinary shares trade on the Nasdaq National Market under the symbol “TSEM”. Since these securities are publicly traded on the open market, they are subject to market fluctuations. Temporary market fluctuations are reflected by increasing or decreasing the presented value of the related securities and recording “other comprehensive income (loss)” in the equity section of the balance sheet. An “other than temporary” decline in market value is reflected by decreasing the cost of the related securities and recording a charge to operating expenses on the income statement. We wrote down the Tower shares due to an “other than temporary” decline in their market value by $1.5 million, $1.5 million, $3.8 million and $6.8 million 2005, 2004, 2002 and 2001, respectively The determination that the decline in market value was “other than temporary” included factors such as market value and the period of time that the market value had been below the adjusted cost in each of the respective periods. A 10% decline in the market value of Tower shares as of December 31, 2005, would have caused us to reduce accumulated other comprehensive income by approximately $200,000 in the year ended December 31, 2005.

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ITEM 8.              FINANCIAL STATEMENTS AND SUPPLEMENTARY DATA

INDEX TO CONSOLIDATED FINANCIAL STATEMENTS

 

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Report of Independent Registered Public Accounting Firm

To the Board of Directors and Stockholders of QuickLogic Corporation:

We have completed integrated audits of QuickLogic Corporation’s 2005 and 2004 consolidated financial statements and of its internal control over financial reporting as of December 31, 2005, and an audit of its 2003 consolidated financial statements in accordance with the standards of the Public Company Accounting Oversight Board (United States). Our opinions, based on our audits, are presented below.

Consolidated financial statements

In our opinion, the consolidated financial statements listed in the accompanying index present fairly, in all material respects, the financial position of QuickLogic Corporation and its subsidiaries at December 31, 2005 and 2004, and the results of their operations and their cash flows for each of the three years in the period ended December 31, 2005 in conformity with accounting principles generally accepted in the United States of America. In addition, in our opinion, the financial statement schedule listed in the index appearing under Item 15(a) (2) presents fairly, in all material respects, the information set forth therein when read in conjunction with the related consolidated financial statements. These financial statements are the responsibility of the Company’s management. Our responsibility is to express an opinion on these financial statements based on our audits. We conducted our audits of these statements in accordance with the standards of the Public Company Accounting Oversight Board (United States). Those standards require that we plan and perform the audit to obtain reasonable assurance about whether the financial statements are free of material misstatement. An audit of financial statements includes examining, on a test basis, evidence supporting the amounts and disclosures in the financial statements, assessing the accounting principles used and significant estimates made by management, and evaluating the overall financial statement presentation. We believe that our audits provide a reasonable basis for our opinion.

Internal control over financial reporting

Also, in our opinion, management’s assessment, included in Management’s Report on Internal Control Over Financial Reporting appearing under Item 9A, that the Company maintained effective internal control over financial reporting as of December 31, 2005 based on criteria established in Internal Control—Integrated Framework issued by the Committee of Sponsoring Organizations of the Treadway Commission (COSO), is fairly stated, in all material respects, based on those criteria. Furthermore, in our opinion, the Company maintained, in all material respects, effective internal control over financial reporting as of December 31, 2005, based on criteria established in Internal Control—Integrated Framework issued by the COSO. The Company’s management is responsible for maintaining effective internal control over financial reporting and for its assessment of the effectiveness of internal control over financial reporting. Our responsibility is to express opinions on management’s assessment and on the effectiveness of the Company’s internal control over financial reporting based on our audit. We conducted our audit of internal control over financial reporting in accordance with the standards of the Public Company Accounting Oversight Board (United States). Those standards require that we plan and perform the audit to obtain reasonable assurance about whether effective internal control over financial reporting was maintained in all material respects. An audit of internal control over financial reporting includes obtaining an understanding of internal control over financial reporting, evaluating management’s assessment, testing and evaluating the design and operating effectiveness of internal control, and performing such other procedures as we consider necessary in the circumstances. We believe that our audit provides a reasonable basis for our opinions.

A company’s internal control over financial reporting is a process designed to provide reasonable assurance regarding the reliability of financial reporting and the preparation of financial statements for

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external purposes in accordance with generally accepted accounting principles. A company’s internal control over financial reporting includes those policies and procedures that (i) pertain to the maintenance of records that, in reasonable detail, accurately and fairly reflect the transactions and dispositions of the assets of the company; (ii) provide reasonable assurance that transactions are recorded as necessary to permit preparation of financial statements in accordance with generally accepted accounting principles, and that receipts and expenditures of the company are being made only in accordance with authorizations of management and directors of the company; and (iii) provide reasonable assurance regarding prevention or timely detection of unauthorized acquisition, use, or disposition of the company’s assets that could have a material effect on the financial statements.

Because of its inherent limitations, internal control over financial reporting may not prevent or detect misstatements. Also, projections of any evaluation of effectiveness to future periods are subject to the risk that controls may become inadequate because of changes in conditions, or that the degree of compliance with the policies or procedures may deteriorate.

PricewaterhouseCoopers LLP

San Jose, California

March 16, 2006

 

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QUICKLOGIC CORPORATION
CONSOLIDATED STATEMENTS OF OPERATIONS
(In thousands, except per share amounts)

 

The accompanying notes form an integral part of these Consolidated Financial Statements.

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QUICKLOGIC CORPORATION
CONSOLIDATED BALANCE SHEETS
(In thousands, except par value amount)

 

The accompanying notes form an integral part of these Consolidated Financial Statements.

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QUICKLOGIC CORPORATION
CONSOLIDATED STATEMENTS OF STOCKHOLDERS’ EQUITY
(In thousands)

 

The accompanying notes form an integral part of these Consolidated Financial Statements.

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